LM1237BDBC/NA National Semiconductor, LM1237BDBC/NA Datasheet - Page 31
LM1237BDBC/NA
Manufacturer Part Number
LM1237BDBC/NA
Description
Video ICs, 150MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs
Manufacturer
National Semiconductor
Datasheet
1.LM1237BDBCNA.pdf
(42 pages)
- Current page: 31 of 42
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Control Register Definitions
Frame Control Register 2
Register Name (address): FRMCTRL2 (0x8401)
Bits 4–0
Bits 7–5
Blinking Period. These five bits set the blinking period of the blinking feature, which is determined by
mulitiplying the value of these bits by 8, and then multiplying the result by the vertical field rate.
Pixels per Line. These three bits determine the number of pixels per line of OSD characters per the following
table which also lists the maximum horizontal scan rate recommended for each setting.
Bits 7–5
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
(Continued)
512 pixels per line
576 pixels per line
640 pixels per line
704 pixels per line
768 pixels per line
832 pixels per line
896 pixels per line
960 pixels per line
Description
31
20023436
Max Horizontal Frequency (kHz)
125
119
112
106
100
93
87
81
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