USB2504-JD Standard Microsystems Corp., USB2504-JD Datasheet - Page 25

• Manufacturer Part Number: USB2504-JD
• Description: Interface, Integrated USB2.0 Compatible 4-Port Hub
• Manufacturer: Standard Microsystems Corp.

Integrated USB2.0 Compatible 4-Port Hub
Datasheet
SMSC USB2504
5.2.3.13
5.3
5.3.1
5.3.1.1
NUMBER
BIT
7:0
EEPROM Offset F(h) - Power-On Time
Instead of loading User-Defined Descriptor data from an external EEPROM, the SMSC Hub can be
configured to receive a code load from an external processor via an SMBus interface. The SMBus
interface shares the same pins as the EEPROM interface, if CFG_SEL1 & CFG_SEL0 activates the
SMBus interface, external EEPROM support is no longer available (and the user-defined descriptor
data must be downloaded via the SMBus). Due to system issues, the SMSC Hub waits indefinitely for
the SMBus code load to complete and only “appears” as a newly connected device on USB after the
code load is complete.
The Hub’s SMBus implementation is a subset of the SMBus interface to the host. The device is a
slave-only SMBus device. The implementation in the device is a subset of SMBus since it only supports
two protocols.
The Write Byte and Read Byte protocols are the only valid SMBus protocols for the Hub. The Hub
responds to other protocols as described in
page
The SMBus interface is used to read and write the registers in the device. The register set is shown
in
Bus Protocols
Typical Write Byte and Read Byte protocols are shown below. Register accesses are performed using
7-bit slave addressing, an 8-bit register address field, and an 8-bit data field. The shading indicates
the Hub driving data on the SMBDATA line; otherwise, host data is on the SDA/SMBDATA line.
The slave address is the unique SMBus Interface Address for the Hub that identifies it on SMBus. The
register address field is the internal address of the register to be accessed. The register data field is
the data that the host is attempting to write to the register or the contents of the register that the host
is attempting to read.
Note: Data bytes are transferred MSB first (msb first).
Byte Protocols
When using the Hub SMBus Interface for byte transfers, a write will always consist of the SMBus
Interface Slave Address byte, followed by the Internal Address Register byte, then the data byte.
The normal read protocol consists of a write to the HUB with the SMBus Interface Address byte,
followed by the Internal Address Register byte. Then restart the Serial Communication with a Read
consisting of the SMBus Interface Address byte, followed by the data byte read from the Hub. This
can be accomplished by using the Read Byte protocol.
Note: For the following SMBus tables:
SMBus Slave Interface
POWER_ON_TIME
Denotes Master-to-Slave
Section 5.3.9, "Internal SMBus Memory Register Set," on page
20. Reference the System Management Bus Specification, Rev 1.0.
BIT NAME
Power On Time: The length of time that is takes (in 2 ms intervals) from the
time the host initiated power-on sequence begins on a port until power is
good on that port.
19
Denotes Slave-to-Master
Section 5.3.2, "Invalid Protocol Response Behavior," on
DESCRIPTION
21.
Revision 1.3 (06-28-04)