CY7C4211V-15AI Cypress Semiconductor Corp, CY7C4211V-15AI Datasheet - Page 14

• Manufacturer Part Number: CY7C4211V-15AI
• Description: IC SYNC FIFO MEM 512X9 32-TQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4211V-15AI

• Function: Synchronous
• Memory Size: 4.6K (512 x 9)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Switching Waveforms
Notes
Document #: 38-06010 Rev. *E
18. t
19. PAE offset = n.
20. If a read is performed on this rising edge of the read clock, there will be Empty + (n−1) words in the FIFO when PAE goes LOW.
(if applicable)
(if applicable)
WCLK and the rising RCLK is less than t
SKEW2
WEN2
WEN2
Q
D
WCLK
WEN1
REN1,
WCLK
RCLK
WEN1
REN1,
REN2
RCLK
0
0
REN2
PAE
–Q
–D
OE
FF
is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of
8
8
DATA IN OUTPUT REGISTER
t
t
LOW
SKEW1
CLKH
[11]
t
ENS
NO WRITE
(continued)
t
SKEW2
Figure 11. Programmable Almost Empty Flag Timing
SKEW2
t
WFF
t
t
A
ENH
t
t
ENS
ENS
, then PAE may not change state until the next RCLK.
[18]
t
t
ENH
ENH
t
CLKL
NO WRITE
Figure 10. Full Flag Timing
t
DS
t
PAE
Note 19
DATA WRITE
DATA READ
t
ENS
t
t
WFF
SKEW1
N + 1 WORDS
[11]
t
ENS
INFIFO
t
ENS
NO WRITE
t
ENH
t
WFF
t
t
A
ENH
CY7C4201V/4211V
Note 20
NEXT DATA READ
DATA WRITE
t
PAE
Page 14 of 19
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