74AVC16835 Philips Semiconductors, 74AVC16835 Datasheet - Page 2

• Manufacturer Part Number: 74AVC16835
• Description: 18-bit registered driver 3-State
• Manufacturer: Philips Semiconductors

1. C
Philips Semiconductors
FEATURES
DESCRIPTION
The 74AVC16835 is a 18-bit universal bus driver. Data flow is
controlled by output enable (OE), latch enable (LE) and clock inputs
(CP).
This product is designed to have an extremely fast propagation
delay and a minimum amount of power consumption.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
Insertion).
support termination line drive during transient. See the graphs on
page 8 for typical curves.
QUICK REFERENCE DATA
GND = 0 V; T
NOTES:
ORDERING INFORMATION
A Dynamic Controlled Output (DCO) circuitry is implemented to
56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II
1999 Jul 23
Wide supply voltage range of 1.2 V to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7.
CMOS low power consumption
Input/output tolerant up to 3.6 V
DCO (Dynamic Controlled Output) circuit dynamically changes
output impedance, resulting in noise reduction without speed
degradation
Low inductance multiple V
and ground bounce
Power off disables 74AVC16835 outputs, permitting Live Insertion
18-bit Registered Driver (3-State)
t
t
C
C
C
PHL
PHL
P
f
SYMBOL
o
I
PD
PD
PD
D
= output frequency in MHz; V
= C
/t
/t
PLH
PLH
is used to determine the dynamic power dissipation (P
PD
amb
V
CC
= 25 C; t
Propagation delay
An to Yn
Propagation delay
LE to Yn;
CP to Yn
Input capacitance
Power dissipation capacitance per buffer
Power dissi ation ca acitance er buffer
2
f
i
+
r
= t
CC
(C
CC
PACKAGES
f
L
and GND pins for minimum noise
through a pullup resistor (Live
2.0 ns; C
PARAMETER
V
CC
CC
= supply voltage in V;
2
L
f
o
= 30 pF.
) where: f
i
= input frequency in MHz; C
D
(C
in W):
L
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
I
I
= GND to V
= GND to V
V
CC
= 1.8 V
= 2.5 V
= 3.3 V
= 1.8 V
= 2.5 V
= 3.3 V
2
2
PIN CONFIGURATION
f
TEMPERATURE
o
–40 C to +85 C
) = sum of outputs.
CC
CC
RANGE
1
1
L
CONDITIONS
= output load capacitance in pF;
GND
GND
GND
GND
V
V
Y
Y
Y
Y
Y
Y
Y
NC
Y
NC
OE
LE
CC
CC
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
10
12
13
14
15
16
17
11
Outputs enabled
0
1
2
3
4
5
6
7
8
9
Output disabled
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
11
1
2
3
4
5
6
7
8
9
74AVC16835 DGG
ORDER CODE
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
Preliminary specification
74AVC16835
TYPICAL
SH00130
GND
NC
A
GND
A
A
V
A
A
A
GND
A
A
A
A
A
A
GND
A
A
A
V
A
A
GND
A
CP
GND
0
1
2
CC
3
4
5
6
7
8
9
10
11
12
13
14
CC
15
16
17
2.6
2.0
1.7
2.8
2.2
1.8
5.0
25
6
DRAWING
SOT364-1
NUMBER
UNIT
pF
pF
ns
ns
F