74AUP2G241 Philips Semiconductors, 74AUP2G241 Datasheet

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74AUP2G241

Manufacturer Part Number
74AUP2G241
Description
Low-power Dual Buffer/line Driver
Manufacturer
Philips Semiconductors
Datasheet

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Part Number:
74AUP2G241DC,125
Manufacturer:
NXP
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3 000
www.DataSheet4U.com
1. General description
2. Features
The 74AUP2G241 provides a dual non-inverting buffer/line driver with 3-state outputs.
The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH
level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level
at pin 2OE causes output 2Y to assume a high-impedance OFF-state.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.
This device has an input-disable feature, which allows floating input signals. The input 1A
is disabled when the output enable input 1OE is HIGH. The input 2A is disabled when the
output enable input 2OE is LOW.
I
I
I
I
I
I
I
I
I
I
CC
74AUP2G241
Low-power dual buffer/line driver; 3-state
Rev. 03 — 12 January 2009
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
Input-disable feature allows floating input conditions
I
OFF
N
N
N
N
N
N
N
N
range from 0.8 V to 3.6 V.
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114E Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V.
CC
= 0.9 A (maximum)
CC
Product data sheet
OFF
.

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74AUP2G241 Summary of contents

Page 1

... Low-power dual buffer/line driver; 3-state Rev. 03 — 12 January 2009 1. General description The 74AUP2G241 provides a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state ...

Page 2

... C to +125 C 74AUP2G241GT +125 C 74AUP2G241GD +125 C 74AUP2G241GM +125 C 4. Marking Table 2. Marking codes Type number 74AUP2G241DC 74AUP2G241GT 74AUP2G241GD 74AUP2G241GM 5. Functional diagram 1OE 1A 2OE 2A 001aah730 Fig 1. Logic symbol 74AUP2G241_3 Product data sheet Description VSSOP8 plastic very thin shrink small outline package; 8 leads; ...

Page 3

... 2OE 001aaj394 Fig 6. SOT902 Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state 74AUP2G241 1OE 2OE GND 001aaf438 Transparent top view Pin configuration SOT833-1 (XSON8) ...

Page 4

... Active mode and Power-down mode +125 C amb derates linearly with 8.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Power-down mode 0 3 Rev. 03 — 12 January 2009 74AUP2G241 Output Min Max Unit 0.5 +4 [1] 0.5 +4 ...

Page 5

... GND 0 3 Rev. 03 — 12 January 2009 74AUP2G241 Min Typ Max Unit ...

Page 6

... GND Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state Min Typ Max [ [1] 0 110 [ 0 1.7 ...

Page 7

... GND Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state Min Typ Max - - 0 0.9 [ [1] 0 120 [ 0. ...

Page 8

... GND. CC Figure Min [2] Figure 0 1 1 1 1. 2 3.6 V 1.4 CC Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state Min Typ Max - - 0. 1.4 [ [1] 0 180 [ 10 +125 C [1] ...

Page 9

... V to 2 3.6 V 2.1 CC [2] Figure 0 1 1 1 1. 2 3.6 V 1.8 CC Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state 10 +125 C [1] Typ Max Min Max ( 69 6.1 11.8 2.9 13.9 4.2 6.6 2.3 7.7 3.4 5.1 2.0 6.2 2.6 3.7 1.7 4.5 2.4 3 ...

Page 10

... V to 2 3.6 V 2.1 CC [4] Figure 0 1 1 1 1. 2 3.6 V 2.4 CC Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state 10 +125 C [1] Typ Max Min Max ( 73 6.9 13.5 3.4 15.8 4.8 7.7 2.2 8.6 3.9 5.8 1.9 6.8 3.2 4.3 1.7 5.3 3.0 3 ...

Page 11

... V to 2 3.6 V 2.9 CC [4] Figure 0 1 1 1 1. 2 3.6 V 3.2 CC Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state 10 +125 C [1] Typ Max Min Max ( 27 7.2 14.1 3.3 15.8 5.1 8.1 2.5 9.8 4.3 6.3 2.0 7.9 3.7 4.9 1.8 6.0 3.5 4 ...

Page 12

... V to 2 3.6 V 5.2 CC [4] Figure 0 1 1 1 1. 2 3.6 V 5.5 CC Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state 10 +125 C [1] Typ Max Min Max ( 37 9.5 19.0 4.4 21.6 6.7 10.8 3.0 13.0 5.6 8.4 2.6 10.3 4.8 6.3 2.5 7.8 4.6 5 ...

Page 13

... V nY output Table 9. are typical output voltage drop that occur with the output load. OH Input 0 Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state 10 +125 C [1] Min Typ Max Min Max ( 2 2.8 ...

Page 14

... OH Output Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state t PZL PZH 0 outputs outputs enabled disabled 001aaa411 t PZL PZH ...

Page 15

... DUT R T 11. [ for measuring propagation delays, setup and hold times and pulse width R L Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state V EXT 001aac521 of the pulse generator EXT t ...

Page 16

... A pin 1 index 2.5 scale (1) ( 0.27 0.23 2.1 2.4 0.12 0.5 0.17 0.08 1.9 2.2 REFERENCES JEDEC JEITA MO-187 Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state detail 3.2 0.40 0.21 0.4 0.2 0.13 0.1 3.0 0.15 0.19 EUROPEAN ...

Page 17

... scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA - - - MO-252 Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state 4 ( EUROPEAN ISSUE DATE PROJECTION © NXP B.V. 2009. All rights reserved. SOT833-1 07-11-14 07-12- ...

Page 18

... scale 3.1 0.5 0.15 0.6 0.5 1.5 2.9 0.3 0.4 0.05 REFERENCES JEDEC JEITA - - - Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state detail 0.1 0.05 0.05 0.1 EUROPEAN PROJECTION © NXP B.V. 2009. All rights reserved. SOT996-2 ISSUE DATE 07-12-18 07-12- ...

Page 19

... 1.65 0.35 0.15 0.55 0.5 0.1 1.55 0.25 0.05 REFERENCES JEDEC JEITA MO-255 - - - Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state detail 0.05 0.05 0.05 EUROPEAN PROJECTION © NXP B.V. 2009. All rights reserved. SOT902-1 ISSUE DATE 05-11-25 ...

Page 20

... Modifications: 74AUP2G241_2 20080219 74AUP2G241_1 20061012 74AUP2G241_3 Product data sheet Data sheet status Product data sheet Added type number 74AUP2G241GD (XSON8U package). Product data sheet Product data sheet Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state Change notice Supersedes - ...

Page 21

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 03 — 12 January 2009 74AUP2G241 Low-power dual buffer/line driver; 3-state © NXP B.V. 2009. All rights reserved ...

Page 22

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: 74AUP2G241_3 All rights reserved. Date of release: 12 January 2009 ...

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