74AUP1G240 Philips Semiconductors, 74AUP1G240 Datasheet
74AUP1G240
Related parts for 74AUP1G240
74AUP1G240 Summary of contents
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... The I OFF the device when it is powered down. The 74AUP1G240 provides the single inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH level at pin OE causes the output to assume a high-impedance OFF-state. This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input OE is HIGH ...
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... Temperature range Name 74AUP1G240GW +125 C 74AUP1G240GM +125 C 74AUP1G240GF +125 C 4. Marking Table 2. Marking Type number 74AUP1G240GW 74AUP1G240GM 74AUP1G240GF 5. Functional diagram 001aac528 Fig 1. Logic symbol 74AUP1G240_1 Product data sheet circuitry provides partial Power-down mode operation Description TSSOP5 plastic thin shrink small outline package ...
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... XSON6 1 output enable input 2 data input A 3 ground ( data output Y 5 not connected 6 supply voltage Rev. 01 — 6 November 2006 74AUP1G240 74AUP1G240 n.c. GND 001aaf549 Transparent top view Fig 6. Pin configuration SOT891 (XSON6) Output ...
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... Active mode Power-down mode 0 3 Conditions Rev. 01 — 6 November 2006 74AUP1G240 Min Max 0.5 +4 [1] 0.5 +4 [1] 0.5 +4 +150 [2] - 250 Min Max 0.8 3.6 0 3.6 ...
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... 3 GND GND 3 GND Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state Min Typ 1.11 - 1.32 - 2.05 - 1.9 - 2. ...
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... 3 input 0 3 all inputs GND Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state Min Typ - - - - - - - - 1.03 - 1.30 - 1.97 - 1.85 - 2. ...
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... 0 3 data input 0 3 input 0 3 all inputs GND GND. CC Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state Min Typ - - - - - - - - 0.93 - 1.17 - 1.77 - 1.67 - 2. ...
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... 1 1. 2 3.6 V 1.3 CC [2] Figure 1 1 1. 2 3.6 V 1.7 CC Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state +125 C [1] Typ Max Min Max ( 22 5.8 12.6 2.8 14.1 4.0 7.3 2.1 3.2 5.5 1.9 2.6 4.1 1.5 2.3 3.6 1 ...
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... 1 1. 2 3.6 V 2.1 CC [4] Figure 1 1 1. 2 3.6 V 2.9 CC Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state +125 C [1] Typ Max Min Max ( 74 7.4 16.3 3.2 18.2 5.1 9.2 2.1 10.9 4.1 7.1 1.8 3.4 5.4 1.7 3.1 4.8 1.7 - 33.7 ...
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... 1 1. 2 3.6 V 2.8 CC [4] Figure 1 1 1. 2 3.6 V 5.2 CC Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state +125 C [1] Typ Max Min Max ( 39 9.7 21.6 4.6 24.3 6.7 12.3 3.0 14.6 5.5 9.5 2.7 11.5 4.6 7.1 2.5 4.3 6.4 2 ...
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... where input M GND t PHL output Table 9. Input 0 Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state +125 C [1] Typ Max Min Max ( 4.2 ...
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... PHZ GND outputs enabled Table 10. Output Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state t PZL PZH V M outputs outputs enabled disabled mna644 0 0. ...
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... Low-power inverting buffer/line driver; 3-state PULSE DUT GENERATOR for measuring propagation delays, setup and hold times and pulse width R L Rev. 01 — 6 November 2006 74AUP1G240 V EXT 001aac521 of the pulse generator EXT ...
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... 1 scale (1) ( 0.30 0.25 2.25 1.35 0.65 0.15 0.08 1.85 1.15 REFERENCES JEDEC JEITA MO-203 SC-88A Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state detail 2.25 0.46 1.3 0.425 0.3 0.1 2.0 0.21 EUROPEAN ...
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... scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state 4 ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2006. All rights reserved ...
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... Product data sheet scale 1.05 0.35 0.40 0.55 0.35 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01 — 6 November 2006 74AUP1G240 Low-power inverting buffer/line driver; 3-state 2 mm EUROPEAN PROJECTION SOT891 ISSUE DATE 05-03-11 05-04-06 © NXP B.V. 2006. All rights reserved ...
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... Transistor-Transistor Logic 15. Revision history Table 13. Revision history Document ID Release date 74AUP1G240_1 20061106 74AUP1G240_1 Product data sheet Low-power inverting buffer/line driver; 3-state Data sheet status Change notice Product data sheet - Rev. 01 — 6 November 2006 74AUP1G240 Supersedes - © NXP B.V. 2006. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 6 November 2006 74AUP1G240 © NXP B.V. 2006. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 6 November 2006 Document identifier: 74AUP1G240_1 ...