74ALVCH16543 Philips Semiconductors, 74ALVCH16543 Datasheet - Page 2

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74ALVCH16543

Manufacturer Part Number
74ALVCH16543
Description
16-bit D-type registered transceiver; 3-state
Manufacturer
Philips Semiconductors
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74ALVCH16543
Manufacturer:
TI/德州仪器
Quantity:
20 000
Philips Semiconductors
FEATURES
DESCRIPTION
The 74ALVCH16543 is a dual octal registered transceiver.
Each section contains two sets of D-type latches for
temporary storage of the data flow in either direction.
FUNCTION TABLE
See note 1.
Note
1. XX = AB for A-to-B direction, BA for B-to-A direction;
1999 Nov 23
In accordance with JEDEC standard no 8-1A
CMOS low power consumption
Direct interface with TTL levels
MULTIBYTE
16-bit transceiver with D-type latch
Combines 16245 and 16373 type functions in one chip
Back-to-back registers for storage
Output drive capability 50
Separate controls for data flow in each direction
All data inputs have bus hold
3-state non-inverting outputs for bus oriented
applications
Current drive 24 mA at 3.0 V.
16-bit D-type registered transceiver; 3-state
H = HIGH voltage level; L = LOW voltage level;
h = HIGH state must be present one set-up time before the LOW-to-HIGH transition of nLE
l = LOW state must be present one set-up time before the LOW-to-HIGH transition of nLE
X = don’t care; NC = no change;
Z = high-impedance OFF-state.
nOE
= LOW-to-HIGH level transition;
H
X
L
L
L
L
L
L
L
XX
flow-through pin-out architecture
nE
H
X
L
L
L
L
L
XX
INPUTS
transmission lines at 85 C
nLE
X
X
H
L
L
L
L
XX
nB
n
H
X
X
X
, nA
h
h
L
l
l
n
2
Separate latch enable (nLE
(nOE
permit independent control in either direction of the data
flow.
The ‘16543’ contains two sections each consisting of two
sets of eight D-type latches with separate inputs and
controls for each set. For data flow from A to B, for
example, the A-to-B enable (nE
inputs must be LOW in order to enter data from nA
or take data from nB
table. With nE
enable (nLE
transparent; a subsequent LOW-to-HIGH transition of the
nLE
and nOE
active and display the data present at the output of the
A latches. Similarly, the nE
control the data flow from B-to-A.
Active bus hold circuitry is provided to hold unused or
floating data inputs at a valid logic level.
AB
AB
signal stores the A data into the latches. With nE
, nOE
AB
OUTPUTS
both LOW, the 3-state B output buffers are
AB
BA
AB
NC
) input makes the A-to-B latches
H
H
Z
Z
Z
Z
L
L
) inputs are provided for each register to
LOW, a LOW signal on the A-to-B latch
0
to nB
BA
7
AB
, as indicated in the function
, nLE
, nLE
74ALVCH16543
disabled
disabled
disabled and latch
latch and display
transparent
hold
AB
AB
AB
, where n equals 1 or 2)
BA
, nLE
Product specification
BA
, nLE
) and output enable
and nOE
STATUS
BA
BA
, nE
, nE
AB
BA
AB
0
or nE
signals
or nE
to nA
BA
AB
BA
7
,
;
;

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