74AHC573 Philips Semiconductors, 74AHC573 Datasheet - Page 2

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74AHC573

Manufacturer Part Number
74AHC573
Description
Octal D-type transparent latch; 3-state
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. The condition is V
1999 Sep 27
t
C
C
C
PHL
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
CDM EIA/JESD22-C101
exceeds 1000 V
Balanced propagation delays
All inputs have Schmitt-trigger
actions
Common 3-state output enable
input
Functionally identical to the ‘563’
and ‘373’
Inputs accepts voltages higher than
V
For AHC only:
operates with CMOS input levels
For AHCT only:
operates with TTL input levels
Specified from
I
O
PD
Octal D-type transparent latch; 3-state
40 to +85 and +125 C.
CC
P
f
f
C
V
i
o
/t
SYMBOL
D
CC
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
(C
= output load capacitance in pF;
= C
is used to determine the dynamic power dissipation (P
= supply voltage in Volts.
L
PD
V
amb
CC
V
2
CC
= 25 C; t
f
2
o
propagation delay
D
input capacitance
output capacitance
power dissipation
capacitance
) = sum of outputs;
I
n
f
= GND to V
i
to Q
+
PARAMETER
r
= t
n
(C
; LE to Q
f
L
3.0 ns.
CC
V
CC
.
n
2
latches.
The ‘573’ consists of eight D-type transparent latches with 3-state true outputs.
When LE is HIGH, data at the D
latches are transparent, i.e. a latch output will change state each time its
corresponding D-input changes.
When LE is LOW the latches store the information that was present at the
D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE
DESCRIPTION
The 74AHC/AHCT573 are high-speed Si-gate CMOS devices and are pin
compatible with low power Schottky TTL (LSTTL). They are specified in
compliance with JEDEC standard No. 7A.
The 74AHC/AHCT573 are octal D-type transparent latches featuring separate
D-type inputs for each latch and 3-state outputs for bus oriented applications.
A Latch Enable (LE) input and an Output Enable (OE) input are common to all
is LOW, the contents of the 8 latches are available at the outputs. When OE is
HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE
input does not affect the state of the latches.
The ‘573’ is functionally identical to the ‘533’, ‘563’ and ‘373’, but the ‘533’ and
‘563’ have inverted outputs and the ‘563’ and ‘373’ have a different pin
arrangement.
f
o
) where:
C
V
C
notes 1 and 2
I
L
L
= V
= 15 pF; V
= 50 pF; f = 1 MHz;
CC
CONDITIONS
or GND
2
CC
D
= 5 V
in W).
n
inputs enters the latches. In this condition the
4.2
3.0
4.0
12
74AHC573; 74AHCT573
AHC
TYPICAL
3.9
3.0
4.0
18
AHCT
Product specification
ns
pF
pF
pF
UNIT

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