74AHC157 Philips Semiconductors, 74AHC157 Datasheet - Page 2

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74AHC157

Manufacturer Part Number
74AHC157
Description
Quad 2-input multiplexer
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
FEATURES
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
ORDERING INFORMATION
1999 Sep 24
74AHC157D
74AHC157PW
74AHCT157D
74AHCT157PW
OUTSIDE NORTH
ESD protection: HBM EIA/JESD22-A114-A
exceeds 2000 V MM EIA/JESD22-A115-A
exceeds 200 V CDM EIA/JESD22-C101
exceeds 1000 V
Balanced propagation delays
All inputs have Schmitt-trigger actions
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Inputs accept voltages higher than V
For AHC only: operates with CMOS input levels
For AHCT only: operates with TTL input levels
Specified from 40 to +85 and +125 C.
Quad 2-input multiplexer
L = LOW voltage level;
X = don’t care.
E
H
L
L
L
L
AMERICA
H
H
S
X
L
L
INPUT
74AHC157D
74AHC157PW DH
74AHCT157D
74AHCT157PW DH
nI
NORTH AMERICA
H
X
X
X
L
0
nI
X
H
X
X
L
1
CC
OUTPUT
nY
H
H
L
L
L
PINS
16
16
16
16
2
DESCRIPTION
The 74AHC/AHCT157 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7A.
The 74AHC/AHCT157 are quad 2-input multiplexers which
select 4 bits of data from two sources under the control of
a common data select input (S). The enable input (E) is
active LOW. When E is HIGH, all of the outputs (1Y to 4Y)
are forced LOW regardless of all other input conditions.
Moving the data from two groups of registers to four
common output buses is a common use of the ‘157’. The
state of the common data select input (S) determines the
particular register from which the data comes. It can also
be used as a function generator.
The device is useful for implementing highly irregular logic
by generating any four of the 16 different functions of two
variables with one variable common.
The ‘157’ is the logic implementation of a 4-pole, 2-position
switch, where the position of the switch is determine by the
logic levels applied to S.
The logic equations are:
1Y = E
2Y = E
3Y = E
4Y = E
The ‘157’ is identical to the ‘158’ but has non-inverting
(true) outputs.
PACKAGE
TSSOP
TSSOP
(1I
(2I
(3I
(4I
SO
SO
1
1
1
1
PACKAGES
S + 1I
S + 2I
S + 3I
S + 4I
0
0
0
0
MATERIAL
S);
S);
S);
S).
plastic
plastic
plastic
plastic
Product specification
74AHCT157
74AHC157;
SOT109-1
SOT403-1
SOT109-1
SOT403-1
CODE

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