74AC153 Fairchild Semiconductor, 74AC153 Datasheet
74AC153
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74AC153 Summary of contents
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... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation Features I reduced by 50% ...
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Truth Table Inputs ...
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Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...
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DC Electrical Characteristics for ACT Symbol Parameter V Minimum HIGH Level IH Input Voltage V Maximum LOW Level IL Input Voltage V Minimum HIGH Level OH Output Voltage V Maximum LOW Level OL Output Voltage I Maximum Input IN Leakage ...
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AC Electrical Characteristics for ACT Symbol Parameter t Propagation Delay PLH Propagation Delay PHL Propagation Delay PLH Propagation Delay PHL ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body www.fairchildsemi.com Package Number M16A 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOIC), EIAJ TYPE II, 5.3mm Wide Package Number M16D 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC16 8 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...