74ABT573 Fairchild Semiconductor, 74ABT573 Datasheet - Page 5

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74ABT573

Manufacturer Part Number
74ABT573
Description
Octal D-Type Latch with 3-STATE Outputs
Manufacturer
Fairchild Semiconductor
Datasheet

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t
t
t
t
t
t
t
t
t
t
t
t
t
C
C
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
OSHL
OSLH
PS
OST
PV
Extended AC Electrical Characteristics
(SOIC Package)
Note 8: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 9: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11: The 3-STATE delay times are dominated by the RC network (500 , 250 pF) on the output and has been excluded from the datasheet.
Skew
(Note 12)
(SOIC Package)
Note 12: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.)
Note 13: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 14: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
to
Note 15: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 16: Propagation delay variation for a given set of conditions (i.e., temperature and V
tested.
Capacitance
Note 17: C
IN
OUT
Symbol
-
(Note 15)
(Note 16)
LOW (t
Symbol
(Note 14)
Symbol
(Note 17)
(Note 14)
(Note 14)
OST
OUT
). This specification is guaranteed but not tested.
Propagation Delay
D
Propagation Delay
LE to O
Output Enable Time
Output Disable Time
is measured at frequency f
n
to O
Pin to Pin Skew, HL Transitions
Pin to Pin Skew, LH Transitions
Duty Cycle, LH–HL Skew
Pin to Pin Skew, LH/HL Transitions
Device to Device Skew LH/HL Transitions
Input Capacitance
Output Capacitance
n
n
Parameter
Parameter
Parameter
1 MHz per MIL-STD-883B, Method 3012.
8 Outputs Switching
T
V
A
Min
CC
1.5
1.5
1.5
1.5
1.5
1.5
1.0
1.0
OSHL
C
40 C to 85 C
(Note 8)
L
4.5V to 5.5V
), LOW-to-HIGH (t
50 pF
8 Outputs Switching
T
V
A
CC
Max
5
Typ
5.2
5.2
5.5
5.5
6.2
6.2
5.5
5.5
C
(Note 12)
5
9
40 C to 85 C
L
4.5V to 5.5V
Max
1.0
1.0
1.4
1.5
2.0
50 pF
OSLH
CC
T
V
A
) from device to device. This specification is guaranteed but not
Min
CC
2.0
2.0
2.0
2.0
2.0
2.0
), or any combination switching LOW
C
(Note 11)
L
(Note 9)
40 C to 85 C
Units
4.5V to 5.5V
pF
pF
250 pF
Max
6.8
6.8
7.5
7.5
8.0
8.0
8 Outputs Switching
T
V
A
V
V
CC
CC
CC
C
(Note 13)
L
40 C to 85 C
4.5V to 5.5V
Max
8 Outputs Switching
1.5
1.5
3.5
3.9
4.0
0V
5.0V
T
250 pF
V
A
Min
2.0
2.0
2.0
2.0
2.0
2.0
CC
C
(Note 10)
L
(Note 11)
40 C to 85 C
4.5V to 5.5V
Conditions
(T
250 pF
www.fairchildsemi.com
-
A
to
-
HIGH and/or HIGH
25 C)
Max
10.5
10.5
9.0
9.0
9.5
9.5
Units
ns
ns
ns
ns
ns
Units
ns
ns
ns
ns
-

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