STLVDS105 ST Microelectronics, STLVDS105 Datasheet

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STLVDS105

Manufacturer Part Number
STLVDS105
Description
4-PORT LVDS AND 4-PORT TTL-TO LVDS REPEATERS
Manufacturer
ST Microelectronics
Datasheet
DESCRIPTION
The STLVDS105 is a differential line receiver and
a LVTTL input connected to four differential line
drivers
characteristics of low voltage differential signaling,
for point to point baseband data transmission over
controlled impedance media of approximately
100 .
printed-circuit board traces, backplanes, or cable.
ORDERING CODES
May 2003
STLVDS105BDR
STLVDS105BTR
STLVDS105BD
RECEIVER AND DRIVERS MEET OR
EXCEED THE REQUIREMENTS OF ANSI
EIA/TIA-644 STANDARD: RECEIVERS
LOW-VOLTAGE TTL (LVTTL) LEVELS
DESIGNED FOR SIGNALING RATES UP TO
630Mbps
OPERATES FROM A SINGLE 3.3V SUPPLY
LOW VOLTAGE DIFFERENTIAL SIGNALING
WITH TYPICAL OUTPUT VOLTAGE OF
350mV AND A 100
PROPAGATION DELAY TIME: 2.2ns (TYP)
ELECTRICALLY COMPATIBLE WITH LVDS,
PECL, LVPECL, LVTTL, LVCOMOS, GTL,
BTL, CTT, SSTL, OR HSTL OUTPUTS WITH
EXTERNAL NETWORK
BUS TERMINAL ESD (HBM) EXCEEDS 7KV
SO AND TSSOP PACKAGING
Type
The
that
transmission
implement
Temperature
-40 to 85 °C
-40 to 85 °C
-40 to 85 °C
Range
LOAD
media
4-PORT LVDS AND 4-PORT TTL-TO LVDS
the
TSSOP16 (Tape & Reel)
can
electrical
SO-16 (Tape & Reel)
SO-16 (Tube)
be
Package
LVDS, as specified in EIA/TIA-644 is a data
signaling technique that offers low-power, low
noise coupling, and switching speed to transmit
data at a speed up to 630Mbps at relatively long
distances.
The drivers integrated into the same substrate,
along with the low pulse skew of balanced
signaling,
alignment of the signals repeated from the input.
The device allows extremely precise timing
alignment of the signal repeated from the input.
This is particularly advantageous in distribution or
expansion of signals such as clock or serial data
stream.
SOP
allow
50parts per tube / 20tube per box
extremely
2500 parts per reel
2500 parts per reel
STLVDS105
Comments
REPEATERS
TSSOP
precise
timing
1/8

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STLVDS105 Summary of contents

Page 1

... PECL, LVPECL, LVTTL, LVCOMOS, GTL, BTL, CTT, SSTL, OR HSTL OUTPUTS WITH EXTERNAL NETWORK BUS TERMINAL ESD (HBM) EXCEEDS 7KV SO AND TSSOP PACKAGING DESCRIPTION The STLVDS105 is a differential line receiver and a LVTTL input connected to four differential line drivers that implement characteristics of low voltage differential signaling, ...

Page 2

... STLVDS105 PIN CONFIGURATION PIN DESCRIPTION PlN N° SYMBOL NAME AND FUNCTION EN1 to EN4 Enable Driver Inputs 6 A Receiver Input 7 NC Not Connected 9, 11, 13 Driver Inputs 10, 12, 14 Driver Inputs 5 GND Ground V Supply Voltage 4 CC ABSOLUTE MAXIMUM RATINGS ...

Page 3

... L ID Enabled 100 L Disabled 0. O( 0.4 sin (4e )+0. 0.4 sin (4e )+0.5V, Disabled I STLVDS105 Min. Typ. Max. 3.0 3.3 3.6 2.0 0.8 0.1 3.6 |V |/2 24-| -40 = 3.3V ±10% over recommended = 25°C) A Min. Typ. Max. 247 340 454 -50 50 -50 50 1.125 1.2 1.375 ...

Page 4

... STLVDS105 SWITCHING CHARACTERISTICS (T values are 25°C) A Symbol Parameter t Propagation Delay Time, PLH Low to High Output t Propagation Delay Time, PHL High to Low Output t Differential Output Signal r Rise Time t Differential Output Signal f Fall Time t Pulse Skew (| sk(P) THL TLH t Channel-to-channel Output ...

Page 5

... TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified T Figure 1 : Output Current vs Output High Voltage Figure 2 : Output Current vs Output Low Voltage = 25°C) j Figure 3 : High to Low Propagation Delay Time Figure 4 : Low to High Propagation Delay Time STLVDS105 5/8 ...

Page 6

... STLVDS105 DIM. MIN 0 0. 9 3.8 G 4 6/8 SO-16 MECHANICAL DATA mm. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.5 45˚ (typ.) 10 6.2 1.27 8.89 4.0 5.3 1.27 0.62 ˚ (max.) inch MIN. TYP. MAX. 0.068 0.004 0.008 0.064 0.013 0.018 0.007 0.010 0.019 0.385 0.393 0.228 0.244 0.050 0.350 0.149 0.157 0.181 ...

Page 7

... PIN 1 IDENTIFICATION 1 mm. TYP MAX. 1.2 0.15 1 1.05 0.30 0.20 5 5.1 6.4 6.6 4.4 4.48 0.65 BSC 8˚ 0.60 0. STLVDS105 inch MIN. TYP. MAX. 0.047 0.002 0.004 0.006 0.031 0.039 0.041 0.007 0.012 0.004 0.0079 0.193 0.197 0.201 0.244 0.252 0.260 0.169 0.173 0.176 0.0256 BSC 0˚ 0.018 0.024 ...

Page 8

... STLVDS105 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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