FM1808 Ramtron Corporation, FM1808 Datasheet - Page 4
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FM1808
Manufacturer Part Number
FM1808
Description
Density = 256Kbit ;; Interface = Parallel ;; Speed = 70ns ;; VDD = 5V
Manufacturer
Ramtron Corporation
Datasheet
1.FM1808.pdf
(12 pages)
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and write access times of the underlying memory are
the same, the user experiences no delay through the
bus. The entire memory operation occurs in a single
bus cycle. Therefore, any operation including read or
write can occur immediately following a write. Data
polling, a technique used with EEPROMs to
determine if a write is complete, is unnecessary.
Precharge Operation
The precharge operation is an internal condition that
prepares the memory for a new access. All memory
cycles consist of a memory access and a precharge.
The precharge is initiated by deasserting the /CE pin
high. It must remain high for at least the minimum
precharge time t
The user determines the beginning of this operation
since a precharge will not begin until /CE rises.
However, the device has a maximum /CE low time
specification that must be satisfied.
Endurance
Internally, a FRAM operates with a read and restore
mechanism. Therefore, each read and write cycle
involves a change of state. The memory architecture
is based on an array of rows and columns. Each read
or write access causes an endurance cycle for an
entire row. In the FM1808, a row is 32 bits wide.
Every 4-byte boundary marks the beginning of a new
row. Endurance can be optimized by ensuring
frequently accessed data is located in different rows.
Regardless, FRAM offers substantially higher write
endurance than other nonvolatile memories. The
rated endurance limit of 10
accesses per second to the same row for over 10
years.
Applications
As the first truly nonvolatile RAM, the FM1808 fits
into
monolithic nature and high performance make it
superior
applications. This applications guide is intended to
facilitate the transition from BBSRAM to FRAM. It
is divided into two parts. First is a treatment of the
advantages of FRAM memory compared with
battery-backed SRAM. Second is a design guide,
which highlights design considerations that should
be reviewed in both retrofit and new design
situations.
FRAM Advantages
Although battery-backed SRAM is a mature and
established solution, it has many weaknesses. These
stem directly or indirectly from the presence of the
Rev. 2.3
May 2003
many
to
diverse
battery-backed
PC
.
applications.
10
cycles will allow 30
SRAM
Clearly,
in
many
its
battery. FRAM uses an inherently nonvolatile
storage mechanism that requires no battery. It
therefore eliminates these weaknesses. The major
considerations in upgrading to FRAM follow:
Construction Issues
1. Cost
The cost of both the component and the
manufacturing overhead of battery-backed SRAM is
high. FRAM with its monolithic construction is
inherently a lower cost solution. In addition, there is
no ‘built-in’ rework step required for battery
attachment when using surface mount parts.
Therefore assembly is streamlined and more cost
effective. In the case of DIP battery-backed
modules, the user is constrained to through-hole
assembly techniques and a board wash using no
water.
2. Humidity
A typical battery-backed SRAM module is qualified
at 60º C, 90% Rh, but under no bias and no pressure.
These conditions are chosen because multi-
component assemblies are vulnerable to moisture
and dirt. FRAM is qualified using HAST – highly
accelerated stress test. This requires 120º C at 85%
Rh, 24.4 psia at 5.5V.
3. System reliability
Data integrity must be questioned when using a
battery-backed
vulnerable to shock and vibration. If the battery
contact comes loose, data will be lost. In addition a
negative voltage, even a momentary undershoot, on
any pin of a battery-backed SRAM can cause data
loss. The negative voltage causes current to be drawn
directly from the battery. These momentary short
circuits can greatly weaken a battery and reduce its
capacity over time. In general, there is no way to
monitor the lost battery capacity. Should an
undershoot occur in a battery backed system during a
power down, data can be lost immediately.
4. Space
Certain disadvantages of battery-backed, such as
susceptibility to shock, can be reduced by using the
old fashioned DIP module. However, this alternative
takes up board space, height, and dictates through-
hole assembly. FRAM offers a true surface-mount
solution that uses 25% of the board space.
Direct Battery Issues
5. Field maintenance
SRAM.
They
are
Page 4 of 12
inherently
FM1808