MC33362 ON Semiconductor, MC33362 Datasheet - Page 9

• Manufacturer Part Number: MC33362
• Description: High Voltage Switching Regulator
• Manufacturer: ON Semiconductor

Introduction
by providing all the active high voltage power, control, and
protection circuitry required for implementation of a
flyback or forward converter on a single monolithic chip.
This device is designed for direct operation from a rectified
120 VAC line source and requires a minimum number of
external components to implement a complete converter. A
description of each of the functional blocks is given below,
and the representative block and timing diagrams are shown
in Figures 19 and 20.
Oscillator and Current Mirror
selected for the timing components R
programs the oscillator charge/discharge current via the
Current Mirror 4 I output, Figure 4. Capacitor C
and discharged by an equal magnitude internal current
source and sink. This generates a symmetrical 50 percent
duty cycle waveform at Pin 7, with a peak and valley
threshold of 2.6 V and 0.6 V respectively. During the
discharge of C
pulse that holds the inverting input of the AND gate Driver
high. This causes the Power Switch gate drive to be held in
a low state, thus producing a well controlled amount of
output deadtime. The amount of deadtime is relatively
constant with respect to the oscillator frequency when
operating below 1.0 MHz. The maximum Power Switch
duty cycle at Pin 16 can be modified from the internal 50%
limit by providing an additional charge or discharge current
path to C
cycle, a discharge current resistor R
Pin 7 to ground. To decrease the maximum duty cycle, a
charge current resistor R
Regulator Output. Figure 5 shows an obtainable range of
maximum output duty cycle versus the ratio of either R
R
D
The MC33362 represents a new higher level of integration
The oscillator frequency is controlled by the values
with respect to R
Figure 21. Maximum Duty Cycle Modification
R C
R D
T
, Figure 21. In order to increase the maximum duty
Regulator Output
T
C
1.0
, the oscillator generates an internal blanking
R
T
T
T
8
6
7
.
I
C
is connected from Pin 7 to the
Comparator
Current
Mirror
Oscillator
PWM
4 I
T
D
2.25 I
and C
is connected from
Current
Limit
Reference
T
OPERATING DESCRIPTION
Blanking
Pulse
. Resistor R
T
is charged
http://onsemi.com
C
or
T
9
the oscillator frequency are given below. The frequency
formula is a first order approximation and is accurate for C
values greater than 500 pF. For smaller values of C
Figure 2. Note that resistor R
Limit Comparator threshold.
PWM Comparator and Latch
the oscillator ramp voltage applied to the non−inverting
input, while the error amplifier output is applied into the
inverting input. The Oscillator applies a set pulse to the
PWM Latch while C
valley voltage, Power Switch conduction is initiated. When
C
output, the PWM Latch is reset, thus terminating Power
Switch conduction for the duration of the oscillator ramp−up
period. This PWM Comparator/Latch
prevents multiple output pulses during a given oscillator
clock cycle. The timing diagram shown in Figure 20
illustrates the Power Switch duty cycle behavior versus the
Compensation voltage.
Current Limit Comparator and Power Switch
means of protecting the output switch transistor from
overstress. Each on−cycle is treated as a separate situation.
Current limiting is implemented by monitoring the output
switch current buildup during conduction, and upon sensing
an overcurrent condition, immediately turning off the switch
for the duration of the oscillator ramp−up period.
allowing a virtually lossless method of monitoring the drain
current. It consists of a total of 3770 cells, of which 50 are
connected to a 9.0 W ground−referenced sense resistor. The
Current Sense Comparator detects if the voltage across the
sense resistor exceeds the reference level that is present at
the inverting input. If exceeded, the comparator quickly
resets the PWM Latch, thus protecting the Power Switch.
The current limit reference level is generated by the 2.25 I
output of the Current Mirror. This current causes a reference
voltage to appear across the 450 W resistor. This voltage
level, as well as the Oscillator charge/discharge current are
both set by resistor R
for R
peak drain current, while C
desired Oscillator frequency. A graph of the Power Switch
peak drain current versus R
related formula below.
T
The formula for the charge/discharge current along with
The pulse width modulator consists of a comparator with
The MC33362 uses cycle−by−cycle current limiting as a
The Power Switch is constructed as a SENSEFET
charges to a voltage that exceeds the error amplifier
T
and C
I
chg dscg
T
, R
I
pk
T
must be chosen first to set the Power Switch
+
+ 12.3
T
T
. Therefore when selecting the values
5.4
R
is discharging, and upon reaching the
T
T
T
is shown in Figure 3 with the
1000
T
R
is chosen second to set the
also programs the Current
T
f [
− 1.115
I
chg dscg
4C
combination
T
T
, refer to
T