MC33298 Motorola, MC33298 Datasheet - Page 6

• Manufacturer Part Number: MC33298
• Description: OCTAL SERIAL SWITCH (SPI Input/Output)
• Manufacturer: Motorola

DYNAMIC ELECTRICAL CHARACTERISTICS
9.0 V
POWER OUTPUT TIMING
NOTES: 1. Output Rise and Fall time respectively measured across a 26
DYNAMIC ELECTRICAL CHARACTERISTICS
9.0 V
DIGITAL INTERFACE TIMING
NOTES: 1. Reset Low duration measured with outputs enabled and going to “off” or disabled condition.
Output Rise Time (V PWR = 13 V, R L = 26 ) (Note 1)
Output Fall Time (V PWR = 13 V, R L = 26 ) (Note 1)
Output Turn “On” Delay Time (V PWR = 13 V, R L = 26 ) (Note 2)
Output Turn “Off” Delay Time (V PWR = 13 V, R L = 26 ) (Note 3)
Output Short Fault Disable Report Delay (Note 4)
Output “Off” Fault Report Delay (Note 5)
SCLK Clock Period (Note 6)
SCLK Clock High Time
SCLK Clock Low Time
Required Low State Duration for Reset (V IL
Falling Edge of CSB to Rising Edge of SCLK (Required Setup Time)
Falling Edge of SCLK to Rising Edge of CSB (Required Setup Time)
SI to Falling Edge of SCLK (Required Setup Time)
Falling Edge of SCLK to SI (Required Hold Time)
SO Rise Time (C L = 200 pF)
SO Fall Time (C L = 200 pF)
SI, CSB, SCLK Incoming Signal Rise Time (Note 2)
SI, CSB, SCLK Incoming Signal Fall TIme (Note 2)
Time from Falling Edge of CSB to SO
Time from Rising Edge of SCLK to SO Data Valid (Note 5)
6
SFPD = 0.2 x V DD
SFPD = 0.2 x V DD
Low Impedance (Note 3)
HIgh Impedance (Note 4)
0.2 V DD
V PWR
V PWR
2. Output Turn “On” Delay time measured from rising edge of CSB to 50% of output “off” V out voltage with R L = 26
3. Output Turn “Off” Delay time measured from rising edge of CSB to 50% of output “off” V out voltage with R L = 26
4. Output Short Fault Disable Report Delay measured from rising edge of CSB to I out = 2.0 A point with output “on,” V out = 5.0 V,
5. Output “Off” Fault Report Delay measured from 50% points of rising edge of CSB to rising edge of output (see Figure 9).
2. Rise and Fall time of incoming SI, CSB, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
3. Time required for output status data to be available for use at SO.
4. Time required for output status data to be terminated at SO.
5. Time required to obtain valid data out from SO following the rise of SCLK.
6. Clock period includes 75 ns rise plus 75 ns fall transition time in addition to clock high and low time.
(see Figure 7 and 9).
(see Figure 7 and 9).
and SFPD = 0.2 x V DD (see Figure 8 and 10).
SO
16 V, – 40 C
16 V, – 40 C
0.8 V DD , C L = 200 pF
Characteristic
Characteristic
T C
T C
125 C, unless otherwise noted.)
125 C, unless otherwise noted.)
0.2 V DD ) (Note 1)
(Characteristics noted under conditions of 4.5 V
(Characteristics noted under conditions of 4.5 V
MC33298
resistive load at 10% to 90% and 90% to 10% voltage points.
t wSCLKH
t wSCLKL
t SI(hold)
Symbol
Symbol
t wRSTB
t SO(dis)
t pSCLK
t SO(en)
t dly(on)
t dly(off)
t dly(off)
t dly(sf)
t SISU
t valid
t lead
t rSO
t fSO
t lag
t rSI
t fSI
t r
t f
MOTOROLA ANALOG IC DEVICE DATA
Min
Min
500
175
175
250
250
250
125
125
0.4
0.4
1.0
1.0
25
25
–
–
–
–
–
–
–
V DD
V DD
resistive load
resistive load
Typ
Typ
1.5
2.5
5.0
5.0
50
50
50
50
50
25
25
25
25
50
–
–
–
–
–
–
–
5.5 V,
5.5 V,
Max
Max
100
100
200
200
200
200
125
20
20
15
15
75
75
–
–
–
–
–
–
–
–
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s