NCP5212A ON Semiconductor, NCP5212A Datasheet - Page 15

• Manufacturer Part Number: NCP5212A
• Description: Single Synchronous Step-Down Controller
• Manufacturer: ON Semiconductor

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sense the voltage level which is developed by a resistor Rocp
so as to program the overcurrent detection threshold voltage.
For typical application, the V
value(40 mV typ) by setting Rocp = 0 W, or directly short the
IDRP/OCP pin to ground. It has the benefit of saving one
component at application board. For other programming
values of V
“Overcurrent Protection Setting” section.
Guidelines for selecting OCP Trip Component
Overvoltage Protection (OVP)
V
set. At that moment, the top gate drive is turned off and the
bottom gate drive is turned on until the V
under voltage (UV) threshold and bottom gate drive is
turned on again whenever V
threshold. EN resets or power recycle the device can exit the
FB
When V
1. Choose the value of Rocp for V
2. Define the DC value of OCP trip point(I
3. Calculate the inductor peak current (I
4. Check with inductor datasheet to find out the value
5. Select C
6. Calculate Rs1 value by the equation:
7. Calculate Rs2 value by the equation:
8. Hence, all the current sense components Rs1, Rs2,
9. If Rs2 is not used (open), set k = 1, at that
voltage for over 1.5 ms blanking time, an OV fault is
that you want. The typical value is 1.5 to 1.8 times
of maximum loading current. For example, if
maximum loading is 10 A, then set OCP trip point
at 15 A to 18 A.
estimated by the equation:
of inductor DC resistance DCR, then calculate the
RS1, RS2 dividing factor k based on the equation:
Typically, 100 nF will be used.
Cs had been found for taget I
moment, the I
FB
I
octh
pk
voltage is above 115% (typical) of the nominal
+ I
S
, please refer to the electrical table of
value between 100 nF to 200 nF.
Rs1 +
OCP_DC
pk
Rs2 +
k +
I
will be restricted by:
pk
k * DCR * Cs
I
+
)
pk
V
k * Rs1
2 * V
V
DCR
* DCR
1 * k
V
octh
FB
octh
o
L
* (V
octh
IN
goes above upper UV
* f
OCP_DC
IN
SW
octh
* V
is set as default
* L
FB
selection.
o
.
)
o
pk
below lower
)which is
OCP_DC
http://onsemi.com
(eq. 4)
(eq. 5)
(eq. 6)
(eq. 7)
(eq. 8)
)
15
fault. The following diagram shows the typical waveform
when OVP event occurs.
Undervoltage Protection (UVP)
voltage event. The under voltage limit is 80% (typical) of the
nominal V
threshold over consecutive 8 clock cycles, an UV fault is set
and the device is latched off such that both top and bottom
gate drives are off. EN resets or power recycle the device can
exit the fault.
Thermal Shutdown
150°C. The IC restarts operation only after the junction
temperature drops below 125°C.
An UVP circuit monitors the V
The IC will shutdown if the die temperature exceeds
Figure 26. Undervoltage Protection
Figure 25. Overvoltage Protection
FB
Top to Bottom : SWN, DL, Vo, PGOOD
Top to Bottom : SWN, Vo, PGOOD
voltage. If the V
FB
FB
voltage to detect under
voltage is below this