NCP1603 ON Semiconductor, NCP1603 Datasheet - Page 27

• Manufacturer Part Number: NCP1603
• Description: PFC/PWM Combo Controller
• Manufacturer: ON Semiconductor

entering Osc pin and a capacitor is added to remove some
possible noise As a result, the current in Figure 73 may not
necessarily passes through the bulk capacitor for fewer
ripple current there.
Output Drive
designed for direct drive of power MOSFET. However, it is
recommended to connect a current limiting resistor to the gate
of the power MOSFET. The PFC section output is capable of
up to −500 mA and +750 mA peak drive current and has a
typical rise and fall time of 53 and 32 ns with a 1.0 nF load
while the PWM section output is capable of up to "1.0 A
peak drive current and has a typical rise and fall time of 40 ns
and a fall time of 15 ns with a 1.0 nF capacitive load.
The output stages of the PFC section and PWM section are
PWM drive
PFC drive
(DCM)
Figure 73. Synchronization Timing Diagram
current
Figure 72. Synchronization Configuration
OSC
current
Out2
Phase 1
Phase 2
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NCP1603
27
Safety Features of NCP1603
(1) Bulk Voltage Overvoltage Protection (OVP)
of the reference current I
higher than 107% of its nominal value), the PFC Drive
Output pin (Pin 7) of the device goes low for protection and
the switch of the V
circuit automatically resumes operation when the output
voltage is lower than 107%.
corresponds to 225 mA × 1.95 MW + 5.0 V = 443.75 V
when R
and V
Figure 31). Hence, it is generally recommended to use
450 V rating output capacitor to allow some design margin.
(2) Bulk Voltage Undervoltage Protection (UVP)
of the reference current I
and consumes less than 50 mA. In normal situation of the
boost converter configuration, the output bulk voltage
V
is higher than 8% of the reference current. It enables the
PFC section to operate. Hence, UVP happens when the
bulk voltage V
pin (Pin 9) is opened, or the FB1 pin (Pin 9) is manually
pulled low.
(3) PFC−Stage Overcurrent Protection
200 mA, the PFC Drive Output (Pin 7) goes low. It
represents the PFC−stage inductor current i
user−defined value. The operation automatically resumes
when the inductor current becomes lower than this
user−defined value at the next clock cycle.
(4) PWM−Stage Short−Circuit Protection
is recognized. The PFC−stage (i.e., V
and the V
Figure 53. The operation will be self−recovered if V
above 7.7 V and V
is implemented by a timer and independent of badly
coupled auxiliary transformer winding.
(5) Latched V
(Pin 3) is between 0 V and I
voltage is above 1.0 V, the Out2 (Pin 13) goes low. When
the voltage increases above 3.0 V, the Out2 goes low and
stays latched off until the circuit is reset by unplugging
from main supply to make V
(4.0 V typical). This feature also offers the designer the
flexibility to implement an externally pull−high latched
protection or latched shutdown circuit.
bulk
When the PFC feedback current I
The maximum OVP threshold is limited to 225 mA that
When the PFC feedback current I
When the PFC sense current I
When V
The normal operating voltage range of the CS2 pin
is always higher than input voltage V
FB1
FB1
FB2
CC2
= 1.95 MW (e.g., 910 kW + 910 kW + 130 kW)
= 5.0 V (for the worst case referring to
CC
remains higher than 3.0 V for 125 ms, a fault
bulk
will operate a double hiccup shown in
Overvoltage Protection
FB2
control
is abnormally under−voltage, the FB1
is below 3.0 V. This fault protection
processing circuit is kept off. The
ref
ref
, the PFC section is shutdown
limit
(i.e., the bulk voltage V
CC2
S1
(1.0 V typical). When the
FB1
is higher than typically
FB1
drop below V
aux
is higher than 107%
is smaller than 8%
) will be disabled
in
L
and the I
exceeds a
CC(reset)
bulk
CC2
FB1
is
is