MCP6142 Microchip Technology, MCP6142 Datasheet - Page 14

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MCP6142

Manufacturer Part Number
MCP6142
Description
600 nA, Non-Unity Gain Rail-to-Rail Input/Output Op Amps
Manufacturer
Microchip Technology
Datasheet

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0
MCP6141/2/3/4
4.5
The MCP6143 is a single op amp with Chip Select
(CS). When CS is pulled high, the supply current drops
to 50 nA (typ.) and flows through the CS pin to V
When this happens, the amplifier output is put into a
high impedance state. By pulling CS low, the amplifier
is enabled. If the CS pin is left floating, the amplifier
may not operate properly. Figure 1-1 shows the output
voltage and supply current response to a CS pulse.
4.6
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 F or larger) within 100 mm to provide
large, slow currents. This bulk capacitor is not required
for most applications and can be shared with other
nearby analog parts.
4.7
An unused op amp in a quad package (MCP6144)
should be configured as shown in Figure 4-7. These
circuits prevent the output from toggling and causing
crosstalk. Circuits A and B are set near the minimum
noise gain. Circuit A can use any reference voltage
between the supplies, provides a buffered DC voltage,
and minimizes the supply current draw of the unused
op amp. Circuit B may draw a little more supply current
for the unused op amp. Circuit C uses the minimum
number of components and operates as a comparator;
it may draw more current than either Circuit A or B.
FIGURE 4-7:
DS21668B-page 14
V
DD
¼ MCP6144 (A)
R
R
MCP6143 Chip Select (CS)
Supply Bypass
Unused Op Amps
R
DD
15R
for single supply) should have a local
V
DD
Unused Op Amps.
¼ MCP6144 (B)
¼ MCP6144 (C)
R
V
DD
10R
V
DD
SS
.
4.8
In applications where low input bias current is critical,
printed circuit board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow, which is greater than the
MCP6141/2/3/4 family’s bias current at 25°C (1 pA,
typ.).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-8.
FIGURE 4-8:
for Inverting Gain.
1.
2.
Non-inverting Gain and Unity Gain Buffer:
a)
b)
Inverting Gain and Trans-impedance Gain (con-
vert current to voltage, such as photo detectors)
amplifiers:
a)
b)
PCB Surface Leakage
Connect the non-inverting pin (V
input with a wire that does not touch the
PCB surface.
Connect the guard ring to the inverting input
pin (V
Common mode input voltage.
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the op
amp (e.g., V
Connect the inverting pin (V
with a wire that does not touch the PCB
surface.
Guard Ring
IN
–). This biases the guard ring to the
IN
DD
+). This biases the guard ring
Example Guard Ring Layout
© 2005 Microchip Technology Inc.
/2 or ground).
V
12
IN
– V
. A 5V difference would
IN
+
IN
–) to the input
IN
+) to the

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