TDA8754 Philips Semiconductors, TDA8754 Datasheet - Page 2

• Manufacturer Part Number: TDA8754
• Description: Triple high speed ADC for LCD drive
• Manufacturer: Philips Semiconductors

Philips Semiconductors
FEATURES
ORDERING INFORMATION
1998 Sep 30
TDA8754H
Triple 8-bit Analog-to-Digital Converter (ADC)
Sampling rate up to 170 MHz
IC controllable via a serial interface, which can be either
I
IC analog input 0.5 to 1.1 V (peak-to-peak value) to
have full-scale ADC input
Clamps for programming a clamp level through a
clamping code between 63 and +64 by steps of 1 LSB
Controllable gain stages: gain controlled independently
on the 3 channels via the serial interface to have a
full-scale resolution to 1%
Low gain variation at different temperatures
Analog bandwidth of 400 MHz
Controllable PLL via the serial interface generates the
ADC clock. It can be locked on line frequencies from
15 kHz up to 280 kHz.
Integrated PLL divider
Integrated clamp pulse and H and V LCD control pulses
generation (independently adjustable in position and
duration). Also a data enable signal can be generated,
independently adjustable in position and duration with
respect to HSYNC.
The pixel clock is available at half the clock frequency
Programmable phase clock adjustment cells
Internal voltage regulators
TTL compatible digital inputs
3.3 V CMOS compatible digital outputs
Outputs: one port output up to 140 MHz or 2-port
demultiplexed outputs on the full speed range.
Operating mode selectable through the serial interface.
Chip enable: high-impedance ADC output
Power-down mode.
Triple high speed ADC for LCD drive
NUMBER
2
C-bus or 3-wire, selected via a TTL input pin
TYPE
LQFP144
NAME
plastic low profile quad flat package; 144 leads; body 20
DESCRIPTION
2
GENERAL DESCRIPTION
The TDA8754 is a triple 8-bit ADC with controllable gain
and clamps for the digitizing of large bandwidth
R, G, B signals. Clamp level, gain, and all the other
settings are controlled via a serial interface (either I
or 3-wire, selected through a logic input). The gain is
optimized for stability versus temperature variations.
The IC also includes a PLL that generates the ADC clock
which can be locked to the horizontal line frequency.
The PLL jitter is minimized for high resolution PC graphics
applications. An external clock can also be used to clock
the ADC.
The clamp pulse is generated on-chip, it can be adjusted
in position (with respect to HSYNC) and duration through
the serial interface.
The horizontal and vertical control pulses for the LCD can
be adjusted in duration through the serial interface. Also a
data enable signal can be generated, independently
adjustable in position (with respect to HSYNC) and
duration through the serial interface.
Outputs: one port output up to 140 MHz or demultiplexed
2-port outputs on the full speed range. Operating mode
selectable through the serial interface.
PACKAGE
20
1.4 mm
Objective specification
TDA8754
SOT486-1
VERSION
2
C-bus