MCP3909-I/SP Microchip Technology, MCP3909-I/SP Datasheet - Page 13

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MCP3909-I/SP

Manufacturer Part Number
MCP3909-I/SP
Description
Power Meter with SPI and Active Power Pulse Output & Internal Oscillator., -40C to +85C, 28-SPDIP, TUBE
Manufacturer
Microchip Technology
Datasheet
3.0
The descriptions of the pins are listed in
TABLE 3-1:
3.1
DV
within the MCP3909.
This pin requires appropriate bypass capacitors and
should be maintained to 5V ±10% for specified
operation.
Information”.
3.2
HPF controls the state of the high-pass filter in both
input channels. A logic ‘1’ enables both filters,
removing any DC offset coming from the system or the
device. A logic ‘0’ disables both filters allowing DC
voltages to be measured.
© 2006 Microchip Technology Inc.
DD
is the power supply pin for the digital circuitry
Pin No.
PIN DESCRIPTIONS
Digital V
High-Pass Filter Input Logic Pin
(HPF)
10
12
13
14
15
16
17
18
19
20
21
22
23
24
11
1
2
3
4
5
6
7
8
9
Refer
PIN FUNCTION TABLE
DD
to
(DV
REFIN/OUT
SDO / NEG
Section 6.0
SCK / F2
Symbol
SDI / F1
CS / F0
HF
MCLR
OSC1
OSC2
F
F
DV
CH0+
CH1+
D
AV
A
CH0-
CH1-
HPF
DD
NC
NC
OUT1
OUT0
G1
G0
GND
GND
OUT
DD
DD
)
“Applications
Table
Digital Power Supply Pin
High-Pass Filters Control Logic Pin
Analog Power Supply Pin
No Connect
Non-Inverting Analog Input Pin for Channel 0 (Current Channel)
Inverting Analog Input Pin for Channel 0 (Current Channel)
Inverting Analog Input Pin for Channel 1 (Voltage Channel)
Non-Inverting Analog Input Pin for Channel 1 (Voltage Channel)
Master Clear Logic Input Pin
Voltage Reference Input/Output Pin
Analog Ground Pin, Return Path for internal analog circuitry
Serial Clock or Frequency Control for HF
Serial Data Input or Frequency Control for F
Chip Select or Frequency Control for F
Gain Control Logic Input Pin
Gain Control Logic Input Pin
Oscillator Crystal Connection Pin or Clock Input Pin
Oscillator Crystal Connection Pin or Clock Output Pin
No Connect
Serial Data Out or Negative Power Logic Output Pin
Digital Ground Pin, Return Path for Internal Digital Circuitry
High-Frequency Logic Output Pin (Intended for Calibration)
Differential Mechanical Counter Logic Output Pin
Differential Mechanical Counter Logic Output Pin
3-1.
3.3
AV
within the MCP3909.
This pin requires appropriate bypass capacitors and
should be maintained to 5V ±10% for specified
operation.
Information”.
3.4
CH0- and CH0+ are the fully differential analog voltage
input
containing a PGA for small-signal input, such as shunt
current sensing. The linear and specified region of this
channel is dependant on the PGA gain. This
corresponds to a maximum differential voltage of
±470 mV/G and maximum absolute voltage, with
respect to A
these pins without the risk of permanent damage.
Refer to Section 1.0 “Electrical Characteristics”.
DD
is the power supply pin for the analog circuitry
channels
Analog V
Current Channel (CH0-, CH0+)
Function
GND
Refer
OUT0/1
, of ±1V. Up to ±6V can be applied to
OUT
for
to
OUT0/1
DD
Logic Input Pin
Logic Input Pin
the
(AV
Section 6.0
Logic Input Pin
DD
MCP3909
current
)
DS22025A-page 13
“Applications
measurement,

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