MCP2030-E/P Microchip Technology, MCP2030-E/P Datasheet - Page 49

• Manufacturer Part Number: MCP2030-E/P
• Description: 3D ANALOG TRANSPONDER (AFE), -40C to +125C, 14-PDIP, TUBE
• Manufacturer: Microchip Technology

5.31.2
The circuit executes 8 SPI commands from the external
MCU. The command structure is:
Command (3 bits) + Configuration Address (4 bits) +
Data Byte and Row Parity Bit with the Most Significant
bit first. Table 5-5 shows the available SPI commands.
TABLE 5-5:
© 2005 Microchip Technology Inc.
Command only – Address and Data are “Don’t Care”, but need to be clocked in regardless.
Read Command – Data will be read from the specified register address.
Write Command – Data will be written to the specified register address.
Command Address
Note:
000
001
010
011
100
101
110
111
COMMAND DECODER/
CONTROLLER
‘P’ denotes the row parity bit (odd parity) for the respective data byte.
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
0000
0001
0010
0011
0100
0101
0110
0111
0000
0001
0010
0011
0100
0101
0110
0111
SPI COMMANDS
Column Parity
Column Parity
Config Byte 0
Config Byte 1
Config Byte 2
Config Byte 3
Config Byte 4
Config Byte 5
Config Byte 0
Config Byte 1
Config Byte 2
Config Byte 3
Config Byte 4
Config Byte 5
XXXX XXXX
XXXX XXXX
XXXX XXXX
XXXX XXXX
XXXX XXXX
XXXX XXXX
Not Used
Status
Data
Parity
Row
X
X
X
X
X
X
P
P
P
P
P
P
P
X
P
P
P
P
P
P
P
X
Clamp on – enable modulation circuit
Clamp off – disable modulation circuit
Enter Sleep mode (any other command wakes the AFE)
AGC Preserve On – to temporarily preserve the current AGC level
AGC Preserve Off – AGC again tracks strongest input signal
Soft Reset – resets various circuit blocks
General – options that may change during normal operation
LCX antenna tuning and LFDATA output format
LCY antenna tuning
LCZ antenna tuning
LCX and LCY sensitivity reduction
LCZ sensitivity reduction and modulation depth
Column parity byte for Config Byte 0 -> Config Byte 5
Status – parity error, which input is active, etc.
Output enable filter, channel enable/disable, etc.
LCX antenna tuning and LFDATA output type
LCY antenna tuning
LCZ antenna tuning
LCX and LCY sensitivity reduction
LCZ sensitivity reduction and modulation depth
Column parity byte for Config Byte 0 -> Config Byte 5
Register is readable, but not writable
The device operates in SPI mode 0,0. In mode 0,0 the
clock idles in the low state (Figure 5-12). SDI data is
loaded into the device on the rising edge of SCLK and
SDO data is clocked out on the falling edge of SCLK.
There must be multiples of 16 clocks (SCLK) while CS
is low or commands will abort.
Description
MCP2030
DS21981A-page 49