SI5010 ETC, SI5010 Datasheet - Page 11

• Manufacturer Part Number: SI5010
• Description: OC-12/3 / STM-4/1 SONET/SDH CLOCK AND DATA RECOVERY IC
• Manufacturer: ETC

Differential Input Circuitry
The Si5010 provides differential inputs for both the high
speed data (DIN) and the reference clock (REFCLK)
inputs. An example termination for these inputs is
shown in Figure 8. In applications where direct DC
coupling is possible, the 0.1 F capacitors may be
omitted. The DIN and REFCLK input amplifiers require
an input signal with a minimum differential peak-to-peak
voltage listed in Table 2 on page 6.
Figure 9. Output Termination for DOUT and CLKOUT (AC Coupled)
Differential
Driver
Figure 8. Input Termination for DIN and REFCLK (AC Coupled)
100
100
Si5010
VDD
VDD
DOUT+,
CLKOUT+
DOUT–,
CLKOUT–
0.1 F
0.1 F
Zo = 50
Zo = 50
0.1 F
0.1 F
Preliminary Rev. 0.31
Zo = 50
Zo = 50
REFC LK+
REFC LK–
D IN +,
D IN –,
Differential Output Circuitry
The Si5010 utilizes a current mode logic (CML)
architecture to output both the recovered clock
(CLKOUT) and data (DOUT). An example of output
termination with AC coupling is shown in Figure 9. In
applications in which direct DC coupling is possible, the
0.1 F capacitors may be omitted. The differential
peak-to-peak voltage swing of the CML architecture is
listed in Table 2 on page 6.
50
50
VDD
VDD
2.5 k
10 k
Si5010
VDD
2.5 k
GND
10 k
102
Si5010
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