SI3461 Silicon Laboratories, SI3461 Datasheet - Page 15

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SI3461

Manufacturer Part Number
SI3461
Description
SINGLE-PORT IEEE 802.3AT POE/POE PSE INTERFACE
Manufacturer
Silicon Laboratories
Datasheet

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Si3461
6. Design Considerations
6.1. Isolation
The Si3461-EVB's PSE output power at VOUT is not isolated from the input power source (VIN). Isolation of PSE
output power requires that the input be isolated from earth ground. Typically, an ac-to-dc power supply is used to
provide the 50 V power so the output of this supply is isolated from earth ground.
6.2. External Component Selection
Detailed notes on external component selection are provided in the Si3461-EVB User's Guide schematics and
BOM. In general, these recommendations must be followed closely to ensure output power stability, surge
protection (surge protection diode), and overall IEEE 802.3 compliance.
6.3. Input DC Supply
The Si3461-EVB reference design requires an isolated 50 V nominal dc input voltage (with a minimum of 44 V and
a maximum of 57 V).
The input power supply should be rated for at least 10% higher power level than the output power level chosen.
This is primarily to account for the losses in the current-sensing resistor, the pass FET, and the series protection
diode of the Si3461-EVB reference design. For example, to support a Class 0 PSE, the input supply should be
capable of supplying at least 16.94 W (15.4 W x 1.10 = 16.94 W).
The power supply also needs to be able to source 425 mA for 60 ms for normal operation or 885 mA for 15 ms for
high power (PoE+) operation.
The Si3461-EVB reference design does not regulate the output voltage during the power-on state; therefore, the
input dc supply should meet the ripple and noise specifications of the IEEE 802.3 standard.
The Si3461-EVB reference design includes an optional 3.3 V shunt regulator that uses the 50 V input to generate
the 3.3 V supply voltage for the Si3461 controller. Alternatively, an external 3.3 V power source may be used.
Rev. 1.0
15
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