SC9641 Silan, SC9641 Datasheet - Page 13

• Manufacturer Part Number: SC9641
• Description: CD Digital Signal Processor
• Manufacturer: Silan

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5.
Note: WR (pin 31), RD (pin 32) is controlled by system (master controller), and ACK (pin 28) is controlled by
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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PARALLEL COMMUNICATION TIMING WAVEFORM
SC9641 (sub-controller), normal state is high level, and DATA is controlled by all above.
1)
2)
3)
Write mode: ACK_H
Read mode: ACK_H
Time of communication protocol:
a. The system set RD: MSB (T1), and begin to read operation.
b. The system wait for SC9461 response ACK: MSB (T2) (SC9641 set ACK after data ready:
c. After the system read out the data, set the RD: LSB (T3).
d. The system wait for the response of SC9641: LSB (T4).
e. After read one byte, according to the a
a. The system set WR: begin to write operation: MSB (T1).
b. The system wait SC9641 acknowledge: MSB (T2)
c. After the system write data to the DATA port, set the WR: LSB (T3).
d. The system wait for the response of SC9641: LSB (T4)
e. After write one byte, according to the a
a. system read (SYS READ):
(After SC9641 read the data, set ACK: LSB)
MSB)
operation.
T2-T1: >=7us
T3-T2: =5us (TYP.), related with the execute speed of master controller.
T4-T3: >=6us
b
b
c
c
d order write the next byte.
d order perform the next byte read
REV:1.0
Page 13 of 15
SC9641
2008.03.24