IDT70V3389S Integrated Device Technology, IDT70V3389S Datasheet - Page 13

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IDT70V3389S

Manufacturer Part Number
IDT70V3389S
Description
High-speed 3.3v 64k X 18 Synchronous Pipelined Dual-port Static Ram With 3.3v Or 2.5v Interface
Manufacturer
Integrated Device Technology
Datasheet

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NOTES:
1. Output state (High, Low, or High-impedance) is determined by the previous cycle control signals.
2. CE
3. Addresses do not have to be accessed sequentially since ADS = V
4. This timing does not meet requirements for fastest speed grade. This waveform indicates how logically it could be done if timing so allows.
NOTES:
1. CE
2. If there is no address change via ADS = V
IDT70V3389S
High-Speed 64K x 18 Dual-Port Synchronous Pipelined Static RAM
only.
0
0
, UB, LB, and ADS = V
ADDRESS
, OE, UB, LB = V
ADDRESS
DATA
DATA
DATA
CNTEN
the data output remains constant for subsequent clocks.
UB, LB
CLK
ADS
CLK
R/
CE
CE
OUT
OUT
OE
W
IN
0
1
(3)
Qx - 1
IL
; CE
t
t
t
t
t
t
SB
SA
SAD
SC
SW
SA
IL
(2)
EXTERNAL
ADDRESS
1
; CE
An
An
, R/W, and CNTRST = V
READ
t
t
t
t
t
HAD
t
HW
HC
HB
HA
HA
1
t
t
CH2
, CNTEN, and CNTRST = V
CH2
(1)
t
t
CYC2
CYC2
READ
IL
t
t
CL2
CL2
(loading a new address) or CNTEN = V
Qx
An +1
t
CD2
IH
t
CD2
.
t
READ WITH COUNTER
Qn
DC
t
OHZ
IH
(4)
.
t
t
SD
Dn + 2
SW
An + 2
Qn
IL
constantly loads the address on the rising edge of the CLK; numbers are for reference use
t
t
HW
HD
6.42
13
WRITE
IL
Qn + 1
An + 3
Dn + 3
t
t
SCN
SAD
(advancing the address), i.e. ADS = V
t
t
HCN
HAD
COUNTER
HOLD
Industrial and Commercial Temperature Ranges
An + 4
t
CKLZ
Qn + 2
(2)
OE
COUNTER
IH
READ
An + 5
READ
WITH
and CNTEN = V
t
CD2
4832 drw 10
Qn + 4
4832 drw 11
IH
Qn + 3
, then

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