IDT72V90823 Integrated Device Technology, IDT72V90823 Datasheet - Page 10

• Manufacturer Part Number: IDT72V90823
• Description: 3.3 Volt Time Slot Interchange Digital Switch
• Manufacturer: Integrated Device Technology

TABLE 2 — VARIABLE THROUGHPUT DELAY VALUE
TABLE 3 — CONSTANT THROUGHPUT DELAY VALUE
TABLE 4 — INTERNAL REGISTER AND ADDRESS MEMORY MAPPING
IDT72V90823 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 2,048 x 2,048
Notes:
1. Bit A7 must be high for access to data and connection memory positions. Bit A7 must be low for access to registers.
2. Channels 0 to 31 are used when serial interface is at 2.048 Mb/s mode
3. Channels 0 to 63 are used when serial interface is at 4.096 Mb/s mode.
4. Channels 0 to 127 are used when serial interface is at 8.192 Mb/s mode.
A7
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(1)
Input Rate
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
Input Rate
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
A6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
A5
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
1
1
A4
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
.
.
.
128 – (n-m) time-slots
32 – (n-m) time-slots
64 – (n-m) time-slots
A3
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
m < n
.
.
.
A2
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
.
.
.
Delay for Constant Throughput Delay Mode
A1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
.
.
.
Delay for Variable Throughput Delay Mode
(m – output channel number)
(n – input channel number)
128 + (128 – n) + m time-slots
32 + (32 – n) + m time-slots
64 + (64 – n) + m time-slots
A0
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
.
.
.
(m – output channel number)
10
(n – input channel number)
m-n + 128 time-slots
m-n + 64 time-slots
m-n + 32 time slots
m = n, n+1, n+2
Location
Control Register, CR
Interface Mode Selection Register, IMS
Frame Alignment Register, FAR
Frame Input Offset Register 0, FOR0
Frame Input Offset Register 1, FOR1
Frame Input Offset Register 2, FOR2
Frame Input Offset Register 3, FOR3
Ch0
Ch1
.
Ch30
Ch31
Ch32
Ch33
.
Ch62
Ch63
Ch64
Ch65
.
Ch126
Ch127
COMMERCIAL TEMPERATURE RANGE
m-n time-slots
m-n time-slots
m-n time slots
(Note 2)
(Note 3)
(Note 4)
m > n+2