IDT7006S Integrated Device Technology, IDT7006S Datasheet - Page 8

• Manufacturer Part Number: IDT7006S
• Description: High-speed 16k X 8 Dual-port Static Ram
• Manufacturer: Integrated Device Technology

IDT7006S/L
HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM
WAVEFORM OF READ CYCLES
NOTES:
1. Timing depends on which signal is asserted last,
2. Timing depends on which signal is de-asserted first,
3. t
4. Start of valid data depends on which timing becomes effective last t
5.
TIMING OF POWER-UP POWER-DOWN
ADDRESS
DATA
BUSY
BUSY has no relation to valid output data.
SEM
BDD
R/
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations
= V
OUT
OUT
CE
OE
W
IH
.
I
CE
I
CC
SB
t
t
t
t
AA
ACE
AOE
LZ
(5)
OE
(4)
(1)
(4)
(4)
CE
or
CE
or
t
PU
.
OE
.
t
RC
50%
AOE
6.07
, t
t
ACE
BDD
, t
(3, 4)
AA
or t
BDD
t
PD
.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
VALID DATA
2739 drw 08
50%
(4)
t
HZ
t
(2)
OH
2739 drw 07
8