IDT71P71804 Integrated Device Technology, IDT71P71804 Datasheet
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IDT71P71804
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IDT71P71804 Summary of contents
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... C, C clocks. In addition, the DDRII has an output “echo” clock, CQ, CQ. (Note 1) WRITE DRIVER (Note2) (Note1) 18M MEMORY ARRAY SELECT OUTPUT CONTROL 1 IDT71P71804 IDT71P71604 Burst of two SRAMs are high-speed synchro- TM and a separate Vref, DDQ The output impedance DD. (Note4) (Note1) DQ ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 The K and K clocks are the primary device input clocks. The K clock is used to clock in the control signals (LD, R/W and B Wx), the address, and the first word of the data burst during a write operation. The K clock is used to clock in the control signals (B Wx), and the second word of the data burst during a write operation ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Pin Definitions Symbol Pin Function Data I/O signals. Data inputs are sampled on the rising edge of K and K during valid write operations. Data outputs are driven during a valid read operation. The outputs are aligned with the rising edge of both C and C during normal operation. When operating in a single clock mode (C and C tied high), the outputs are aligned with the rising edge of both K and K ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Pin Definitions continued Symbol Pin Function DLL Turn Off. When low this input will turn off the DLL inside the device. The AC timings with the DLL turned off will be different from those listed in this data sheet. There will be an increased propagation delay from the incidence of ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Pin Configuration IDT71P71804 ( REF Dof ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Pin Configuration IDT71P71604 (512K REF Dof ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Write Descriptions (1,2,3) Signal 0 BW Write Byte 0 L Write Byte 1 X Write Byte 2 X Write Byte 3 X NOTES: 1) All byte write (B Wx) signals are sampled on the rising edge of K and again on K ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Application Example R Data Bus Address LD R MEMORY CONTROLLER Return CLK V t Source CLK Return Source R=50 SRAM #1 W R=250 REF 6 ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Absolute Maximum Ratings Symbol Rating Supply Voltage on V with DD V TERM Respect to GND Supply Voltage on V with DDQ V TERM Respect to GND Voltage on Input terminals with V TERM respect to GND Voltage on Output and I/O ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Parameter Symbol Input Leakage Current I IL Output Leakage Current I OL Operating Current I DD (x36): DDR Operating Current I DD (x18): DDR ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Input Electrical Characteristics Over the Operating Temperature and Supply Voltage Range PARAMETER SYMBOL Input High Voltage (DC Input Low Voltage (DC) Input High Voltage (AC) Input Low Voltage, AC ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst Test Conditions (1) Parameter Symbol Core Power Supply Voltage V DD I/O Power Supply Voltage V DDQ Input High Level V IH Input Low Level V IL Input Reference Level VREF Input Rise/Fall Time TR/TF DQ Rise/Fall Time ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst Electrical Characteristics Symbol Parameter Clock Parameters t Clock Cycle Time (K,K,C,C) KHKH t Clock Phase Jitter (K,K,C,C) KC var t Clock High Time (K,K,C,C) KHKL t Clock LOW Time (K,K,C,C) KLKH t Clock (K→K,C→C) KHKH t Cl ock to clock (K→K,C→C) ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Timing Waveform of Combined Read and Write Cycles NOP Read A0 Read A1 (burst of 2) (burst tKHKL tKLKH tKHKH tKHKH K LD tIVKH tKHIX R tAVKH tKHAX DQ Qx1 tKHCH tKHCH tCHQV ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 IEEE 1149.1 TEST ACCESS PORT AND BOUNDARY SCAN-JTAG This part contains an IEEE standard 1149.1 Compatible Test Access Port (TAP). The package pads are monitored by the Serial Scan circuitry when in test mode. This is to support connectivity testing during manufacturing and system diagnostics ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Scan Register Definition Part Instrustion Register 512K x36 3 bits 1Mx18 3 bits Identification Register Definitions INSTRUCTION FIELD ALL DEVICES Revision Number (31:29) Device ID (28:12) IDT JEDEC ID CODE (11:1) ID Register Presence Indicator (0) Bypass Register 1 bit ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Boundary Scan Exit Order (1M x 18-Bit) ORDER PIN 11P 11 10P 12 10N 10M 15 11N 11L 19 11M 10L ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Boundary Scan Exit Order (512K x 36-Bit) ORDER PIN 11P 10N 13 10P 14 11M 11N 18 11L 19 10L 10M ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 JTAG DC Operating Conditions Parameter Symbol I/O Power Supply V DDQ Power Supply Voltage V DD Input High Level V IH Input Low Level V IL TCK Input Leakage Current I IL TMS, TDI Input Leakage Current ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 JTAG AC Characteristics Parameter Symbol TCK Cycle Time t CHCH TCK High Pulse Width t CHCL TCK Low Pulse Width t CLCH TMS Input Setup Time t MVCH TMS Input Hold Time t CHMX TDI Input Setup Time ...
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... IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Package Diagram Outline for 165-Ball Fine Pitch Grid Array Commercial Temperature Range 6.42 21 ...
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... SRAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress Semiconductor, IDT, and Micron Technology, Inc. “ BQ Package BQ 165 Fine Pitch Ball Grid Array (fBGA) 250 200 Clock Frequency in MegaHertz 167 IDT71P71804 DDR II SRAM Burst of 2 IDT71P71604 512K x 36 DDR II SRAM Burst of 2 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 6.42 22 ...
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... IDT71P71804 ( -Bit) 71P71604 (512K x 36-Bit DDR II SRAM Burst of 2 Revision History REVISION DATE 0 07/29/05 A 04/21/06 PAGES DESCRIPTION 1-24 Released Final datasheet 1-3,7,8,10,13, Removed 2Mx8 (71P71204) and 2Mx9 (71P71104) device options. 16,17,22 9,12,19 Clarified VDDQ maximum value equals VDD. 10 Updated IDD operating current for x36 and x18 options. ...