SA56 Apex Microtechnology, SA56 Datasheet - Page 6

• Manufacturer Part Number: SA56
• Description: PULSE WIDTH MODULATION AMPLIFIER
• Manufacturer: Apex Microtechnology

SA56
MODES OF OPERATION
4-QUADRANT - ANALOG MODE
digital inputs. In the analog mode, the capacitor from C
SIG
nal. See Figure 2. An analog voltage applied to the PWM pin
is compared to a 2.5 volt reference within the SA56 thereby
governing the duty cycle of the output. Note that the analog
pin DIR pin 16 is connected to signal ground (SIG
OPERATING WITH DIGITAL INPUTS
when driven with a digital PWM signal from a microcontroller or
DSP. When using a digital modulation signal, tie the C
to SIG
When operating in the digital mode, pulse widths should be no
less than 100 ns and the switching frequency should remain
less than 500 kHz. This will allow enough time for the output
MOSFETs to reach their full on and off states before receiving
a command to reverse state.
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: [phone]
6
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The following chart shows the 3 modes of operation.
The SA56 can operate in 4-quadrant mode with analog or
Two and 4-quadrant operation are possible with the SA56
2 Quadrant – Analog Mode
2 Quadrant – Digital Mode
4 Quadrant – Digital Mode
GND
GND
sets the frequency of an internal triangular ramp sig-
to disable the internal oscillator and ramp generator.
Mode
pacitor to set
Connect ca-
frequency
SIG
SIG
SIG
pin 12
C
PWM
GND
GND
GND
GND
Analog control
Modulation In
Modulation In
).
PWM
High (V
PWM
(1 – 4V)
voltage
pin 17
PWM
pin
to
DD
)
2-QUADRANT - DIGITAL MODE
PWM pin 17 of the SA56 with a digital PWM signal supplied
by a microcontroller or DSP, as depicted in Figure 3. When
using a digital modulation signal, connect the C
SIG
ramp generator.
output duty cycle at one output pin while the other output pin is
held "HIGH". The input at the DIR pin (V
the output behavior. If DIR is a logic HIGH, the A
will be held high and the B
complement of the PWM input signal. The average output at
A
logic LOW, the B
output will be switched.
and power dissipation, but limits the ability to control the motor
at very low speed.
OUT
Two-quadrant operation of the FETs is realized by driving
A digital PWM signal applied to the PWM pin controls the
Operating in two-quadrant mode reduces switching noise
Low (SIG
Low (SIG
Modulated In
GND
High (V
will always be greater than at B
pin 16
to disable the internal oscillator and its companion
DIR
DD
GND
GND
)
)
)
+
OUT
greater than V
output will be held "HIGH" and the A
(A
Control voltage
OUT
pins 21, 23
High (V
average
voltage
PWM
OUT
A
– B
DIR
OUT
OUT
output will be switched as the
S
)
)< 0
REF
OUT
:
DD
. Whereas if DIR is a
CONSIDERATIONS
greater than V
or SIG
(B
Control voltage
OUT
High (V
pins 2, 3
average
voltage
PWM
B
– A
GND
OPERATING
DIR
OUT
PWM
OUT
) governs
OUT
S
)
output
)> 0
pin to
REF
OUT
: