HT0313A Tomato LSI, Inc., HT0313A Datasheet - Page 22

• Manufacturer Part Number: HT0313A
• Description: 65COM/132SEG DRIVER & CONTROLLER FOR STN LCD
• Manufacturer: Tomato LSI, Inc.

HT0313A
TOMATO LSI Inc.
6-3. LCD DISPLAY CIRCUITS
a. Oscillator
HT0313A implement complete on-chip oscillator and its frequency is nearly independent of VDD.
This oscillator signal is used in the voltage converter and display timing generation circuit.
The oscillator circuit is enabled when MS=”H” and CLS=”H”. When the external clock is used, set
CLS=”L” and imply clock signal to CL pin.
b. Display timing generator circuit
This circuit generates timing signals to be used for displaying LCD. The display clock (CL) is generated
by oscillation clock and CL generates the clock for the line counter and the signal for the display data
latch. The line address of DDRAM is generated in synchronization with CL. The 132-bit display data is
latched in the display data latch circuit synchronized with CL. Reading to the display data liquid crystal
driver circuit is completely independent of access to the DDRAM by the MPU. The display timing
generator circuit generates an LCD AC signal (M) which enables the LCD driver to make a AC drive
waveform, and also generates an internal common timing signal and start signal to the common driver.
Driving 2-frame AC driver waveform and internal timing signal are shown in figure 6-7.
When HT0313A is used multiple-chip configuration, the slave chip requires the M, CL and DISP signals
from the master. Table 6-4 shows the M, CL, and DISP status.
Table 6-4. Master and slave timing signal status
COM0
COM1
SEGn
CL
Operation mode
M
Master mode
Slave mode
64
65COM / 132SEG DRIVER & CONTROLLER FOR STN LCD
65
Figure 6-7. 2-frame AC driving waveform (Duty ratio = 1/65)
1
2
22
External
External
3
Internal
Internal
Clock
4
5
6
7
8
MS
H
H
L
L
9
10 …………… 57
CLS
H
H
L
L
58
59
60
Output
Output
Input
Input
61
M
62
63
64
Output
Input
Input
Input
65
CL
1
Ver 0.0
2
3
Output
Output
Input
Input
4
DISP
VSS
VSS
VSS
V0
V1
V2
V3
V4
V0
V1
V2
V3
V4
V0
V1
V2
V3
V4