HDG-0807BD Analog Devices, HDG-0807BD Datasheet - Page 2

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HDG-0807BD

Manufacturer Part Number
HDG-0807BD
Description
Hybrid Video Digital-to-Analog Converter
Manufacturer
Analog Devices
Datasheet
Typical Electrical Specifications
Notes:
1. Specified over complete pixel
2. Measured at unity gain
Block Diagram— Sensor Architecture
Ctrl
Serial
DIN
Pixel Size
Maximum Clock Rate
A/D Dynamic Range
Pixel Signal-to-Noise Ratio (SNR)
Noise (Equivalent electrons) kTC
Dark Current
Sensitivity
Peak Quantum Efficiency
Saturation
Full Well Capacity
Conversion Gain
Programmable Gain Range
Fill Factor
Exposure Control
Package
Supply Voltage
Power Consumption
Operating Temperature
Data
Register Set
Sequencer
Interface
Control
Reg Data
Control
Reg 0
Reg 1
Reg n
Serial
Main
Serial
Clock
DO OE
[2]
Control Signals
[1]
Column Addr
PGA GAIN0/1
Row Addr
Interface
Data Out
Column
Control
Control
Control
Control
Parallel
Control
Row
PGA
ADC
[2]
Ctrl
Ctrl
Ctrl
Ctrl
Ctrl
[1, 2]
PGA 0
ADC 0
Output
Gain
10 Bit Parallel
Data Out
APS ARRAY
Analog Row Buffer
Column Decoder
Buffer
PGA 1
ADC 1
Gain
7.8 x 7.8 m
25 MHz from externally supplied clock source
60 dB
66 dB
36 electrons
0.1 nA/cm
1.3 V/(Lux-sec @ 550 nm)
21%
1.3 V
65,000 electrons
16 V/electron
1 – 40 (255 increments)
42%
0.5 s – 4 s in 0.5 s steps
44 pin gull wing optical PQFP
3.3 V, -5/+10%
200 mW max operating; 3.3 mW max standby
-5 to 65 C
2
@ 22 C ambient
www.hp.com/go/imagingelectronics
For technical assistance or the location of
your nearest Hewlett-Packard sales
office, distributor or representative call:
Americas/Canada: 1-800-235-0312 or
408-654-8675
Far East/Australasia: Call your local HP
sales office.
Japan: (81 3) 3335-8152
Europe: Call your local HP sales office.
Data subject to change.
Copyright © 1998 Hewlett-Packard Co.
Obsoletes 5968-2422E
5968-3057E (11/98)

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