MACH211SP-10 Advanced Micro Devices, MACH211SP-10 Datasheet - Page 31

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MACH211SP-10

Manufacturer Part Number
MACH211SP-10
Description
High-Density EE CMOS Programmable Logic
Manufacturer
Advanced Micro Devices
Datasheet

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MACH211SP-10JC-12JI
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POWER-UP RESET
The MACH devices have been designed with the capa-
bility to reset during system power-up. Following
power-up, all flip-flops will be reset to LOW. The output
state will depend on the logic polarity. This feature pro-
vides extra flexibility to the designer and is especially
valuable in simplifying state machine initialization. A
timing diagram and parameter table are shown below.
Due to the synchronous operation of the power-up
Parameter Symbol
Registered
t
t
WL
PR
t
Output
S
Power
Clock
Power-Up Reset Time
Input or Feedback Setup Time
Clock Width LOW
Parameter Descriptions
4 V
MACH211SP-7/10/12/15/20
Power-Up Reset Waveform
t
PR
reset and the wide range of ways V
steady state, two conditions are required to insure a
valid power-up reset. These conditions are:
1. The V
2. Following reset, the clock input must not be driven
from LOW to HIGH until all applicable input and
feedback setup times are met.
t
WL
CC
t
S
rise must be monotonic.
See Switching Characteristics
Max
10
CC
can rise to its
V
CC
Unit
s
20405B-23
31

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