25C320 MicrochipTechnology, 25C320 Datasheet - Page 5

• Manufacturer Part Number: 25C320
• Description: 32K5.0VSPIBusSerialEEPROM
• Manufacturer: MicrochipTechnology

2.0
The 25C320 is a 4096-byte EEPROM designed to
interface directly with the serial peripheral interface (SPI)
port of many of today’s popular microcontroller families,
including Microchip’s midrange PIC16CXX microcontrol-
lers. It may also interface with microcontrollers that do
not have a built-in SPI port by using discrete I/O lines
programmed properly with software.
The 25C320 contains an 8-bit instruction register. The
part is accessed via the SI pin, with data being clocked
in on the rising edge of SCK. The CS pin must be low
and the HOLD pin must be high for the entire operation.
If the WPEN bit in the status register is set, the WP pin
must be held high to allow writing to the nonvolatile bits
in the status register.
Table 2-1 contains a list of the possible instruction bytes
and format for device operation. All instructions,
addresses and data are transferred MSB first, LSB last.
Data is sampled on the first rising edge of SCK after CS
goes low. If the clock line is shared with other peripheral
devices on the SPI bus, the user can assert the HOLD
input and place the 25C320 in ‘HOLD’ mode. After
releasing the HOLD pin, operation will resume from the
point when the HOLD was asserted.
2.1
The 25C320 contains a write enable latch. This latch
must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch. The following is
a list of conditions under which the write enable latch
will be reset:
• Power-up
• WRDI instruction successfully executed
• WRSR instruction successfully executed
• WRITE instruction successfully executed
2.2
The RDSR instruction provides access to the status
register. The status register may be read at any time,
even during a write cycle. The status register is format-
ted as follows:
The Write-In-Process (WIP) bit indicates whether the
25C320 is busy with a write operation. When set to a ‘1’
a write is in progress, when set to a ‘0’ no write is in
progress. This bit is read only.
WPEN
1996 Microchip Technology Inc.
7
PRINCIPLES OF OPERATION
Write Enable (WREN) and Write
Disable (WRDI)
Read Status Register (RDSR)
6 5 4
X X X
BP1
3
BP0
2
WEL
1
WIP
0
Preliminary
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘1’ the latch
allows writes to the array and status register, when set
to a ‘0’ the latch prohibits writes to the array and status
register. The state of this bit can always be updated via
the WREN or WRDI commands regardless of the state
of write protection on the status register. This bit is read
only.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write protected. These bits
are set by the user issuing the WRSR instruction.
These bits are non-volatile.
The Write Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write Protect (WP) pin and the Write Protect Enable
(WPEN) bit in the status register control the
programmable
Hardware write protection is enabled when the WP pin
is low and the WPEN bit is high. Hardware write
protection is disabled when either the WP pin is high or
the WPEN bit is low. When the chip is hardware write
protected, only writes to nonvolatile bits in the status
register are disabled. See Table 2-2 for matrix of
functionality on the WPEN bit and Figure 2-1 for a
flowchart of Table 2-2.
See Figure 3-5 for RDSR timing sequence.
TABLE 2-1:
Instruction
WRITE
WREN
WRSR
RDSR
READ
WRDI
Name
Instruction
0000 0110 Set the write enable latch
0000 0100 Reset the write enable
0000 0101 Read status register
0000 0001 Write status register (write
0000 0011 Read data from memory
0000 0010 Write data to Memory
Format
hardware
INSTRUCTION SET
(enable write operations)
latch (disable write opera-
tions)
protect enable and block
write protection bits)
array beginning at
selected address
Array beginning at
Selected Address
write
Description
25C320
protect
DS21159B-page 5
feature.