SDM-08060 Sirenza Microdevices, SDM-08060 Datasheet - Page 2

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SDM-08060

Manufacturer Part Number
SDM-08060
Description
Class AB 60W Power Amplifier Module
Manufacturer
Sirenza Microdevices
Datasheet
Simplified Device Schematic
Pin Out Description
303 S. Technology Court, Broomfield, CO 80021
Absolute Maximum Ratings
Drain Voltage (V
RF Input Power
Load Impedance for Continuous Operation
Without Damage
Control (Gate) Voltage, VDD = 0 VDC
Output Device Channel Temperature
Lead Temperature During Solder Reflow
Operating Temperature Range
Storage Temperature Range
Operation of this device beyond any one of these limits may
cause permanent damage. For reliable continuous operation see
typical setup values on the key specification table on the first
page of the datasheet.
2,4,7,9
Flange
Pin #
6,10
1,5
3
8
1
2
3
5
4
RF Output
Function
RF Input
Ground
Gnd
V
V
Parameters
DD
GS
DD
)
Case Flange = Ground
Q1
Q2
This is the gate bias for the one side of the amplifier module.
Module Topside ground.
Module RF input. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads.
Care must be taken to protect against video transients that may damage the active devices.
This is the drain feed for the amplifier module. See Note 1.
Module RF output. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads.
Care must be taken to protect against video transients that may damage the active devices.
Exposed area on the bottom side of the package provides electrical ground and a thermal transfer path for the
device. Proper mounting insures optimal performance and the highest reliablility. See Sirenza applications
note:AN-054 Detailed Installation Instructions for Power Modules.
-40 to +100
-20 to +90
Value
+200
+210
+37
5:1
35
15
Phone: (800) SMI-MMIC
VSWR
dBm
Unit
ºC
ºC
ºC
ºC
V
V
10
9
8
7
6
2
Description
SDM-08060 869-894 MHz 60W Amp
Note 1:
Internal RF decoupling is included on all bias
leads. No additional bypass elements are
required, however some applications may
require energy storage on the drain leads to
accommodate time-varying waveforms.
Note 2:
Gate voltage must be applied coincident with or
after application of the drain voltage to prevent
potentially destructive oscillations. Bias volt-
ages should never be applied to a module
unless it is terminated on both input and output.
Note 3:
The VGS corresponding to a specific IDQ will
vary from module to module and may vary
between the two sides of a dual RF module by
as much as ±0.10 volts. This is due to the nor-
mal die-to-die variation in threshold voltage of
Note 4:
Since the gate bias of an LDMOS transistor
changes with device temperature, it may be nec-
essary to use a VGS supply with thermal com-
pensation if operation over a wide temperature
range is required.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
http://www.sirenza.com
EDS-XXXXXX Rev A
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