S12CPUV2 Motorola, S12CPUV2 Datasheet - Page 102
S12CPUV2
Manufacturer Part Number
S12CPUV2
Description
MC9S12DT128 Device User Guide V02.09
Manufacturer
Motorola
Datasheet
1.S12CPUV2.pdf
(138 pages)
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MC9S12DT128 Device User Guide — V02.09
The total power dissipation can be calculated from:
Two cases with internal voltage regulator enabled and disabled must be considered:
T A
P D
P INT
102
JA
1. Internal Voltage Regulator disabled
2. Internal voltage regulator enabled
Which is the sum of all output currents on I/O ports associated with VDDX and VDDR.
For R
respectively
I
additionally contains the current flowing into the external loads with output high.
Which is the sum of all output currents on I/O ports associated with VDDX and VDDR.
DDR
=
=
=
Ambient Temperature, [ C
=
Total Chip Power Dissipation, [W]
Package Thermal Resistance, [ C/W]
is the current shown in Table A-7 and not the overall current flowing into VDDR, which
DSON
Chip Internal Power Dissipation, [W]
is valid:
P INT
R
DSON
=
I
P INT
R DSON
DD
=
V
P IO
P IO
=
DD
V DD5 V OH
----------------------------------- - for outputs driven high
I DDR V DDR
=
P D
+
=
=
I OH
V OL
----------- - for outputs driven low
I
I OL
DDPLL
–
=
i
i
P INT
;
R DSON
R DSON
;
V
+
+
DDPLL
P IO
I DDA V DDA
I IO
I IO
i
i
2
2
+
I
DDA
V
DDA
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