MC14040B
12-Bit Binary Counter
P-Channel and N-Channel enhancement mode devices in a single
monolithic structure. This part is designed with an input wave shaping
circuit and 12 stages of ripple-carry binary counter. The device
advances the count on the negative-going edge of the clock pulse.
Applications include time delay circuits, counter controls, and
frequency-driving circuits.
Features
•
•
•
•
•
•
•
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
to the range V
(e.g., either V
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2007
Symbol
V
I
The MC14040B 12-stage binary counter is constructed with MOS
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
in
in
Schottky TTL Load Over the Rated Temperature Range
Fully Static Operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low-power TTL Loads or One Low-power
Common Reset Line
Pin-for-Pin Replacement for CD4040B
Pb-Free Packages are Available
V
T
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
P
, V
, I
T
T
stg
DD
D
A
L
out
out
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
SS
(DC or Transient)
(DC or Transient) per Pin
(Note 1)
(8-Second Soldering)
or V
v (V
DD
in
). Unused outputs must be left open.
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
in
and V
-0.5 to V
SS
-0.5 to +18.0
-55 to +125
-65 to +150
out
)
Value
±10
500
260
should be constrained
DD
+ 0.5
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W
G
CASE 751B
CASE 948F
SOEIAJ-16
TSSOP-16
DT SUFFIX
CASE 648
CASE 966
P SUFFIX
D SUFFIX
F SUFFIX
SOIC-16
PDIP-16
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Indicator
Publication Order Number:
16
1
16
16
16
1
1
DIAGRAMS
1
MARKING
MC14040BCP
AWLYYWWG
MC14040B
AWLYWW
MC14040B/D
14040BG
ALYWG
ALYW G
040B
14
G