BR35H160-WC ROHM Co. Ltd., BR35H160-WC Datasheet - Page 10

• Manufacturer Part Number: BR35H160-WC
• Description: Automotive Serial Eeproms
• Manufacturer: ROHM Co. Ltd.

●Method to cancel each command
© 2011 ROHM Co., Ltd. All rights reserved.
BR35H□□□-WC Series
www.rohm.com
○READ
○RDSR
○WRITE, PAGE WRITE
○WREN/WRDI
・Cancellation method: cancel by CSB = “H”
・Cancellation method: cancel by CSB = “H”
Note 1) If Vcc is set to OFF during execution of write the data of the designated address is not guaranteed. Please
Note 2) If CSB rises at the same timing as that the SCK rises, write execution / cancel will become unstable.
a：Ope code, address input area.
b：Data input area (D7~D1 input area)
c：Data input area (D0 area)
d：tE/W area.
a：From ope code to 7-th clock rise, cancel by CSB = “H”.
b：Cancellation is not possible when CSB rises after the 7-th clock.
Cancellation possible by CSB=”H”
Cancellation possible by CSB=”H”
Write starts after CSB rise.
After CSB rise, cancellation is no longer possible.
Cancellation is possible by CSB = “H”. However, when
write starts (CSB rise) in area c, cancellation is no
longer possible. Also, cancellation is not possible by
continues inputting of SCK clock. In page write
mode, there is a write enable area at every 8 clocks.
execute write again.
Therefore, it is recommended to let CSB rise in the SCK = “L” area. As for SCK rise, ensure a timing of tCSS /
tCSH or higher.
10/16
SCK
Fig.41 RDSR cancel valid timing
SI
Fig.40 READ cancel valid timing
Ope code
Ope code
8 bits
Cancel available in all areas of read mode
8bits
D7
Fig.43 WREN/WRDI cancel valid timing
Fig.42 WRITE cancel valid timing
D6
a
Ope code
D5
8 bits
Cancel available in all
areas of rdsr mode
Address
8 bits/16bits
Address
16bits
D4
SCK
b
D3
8 bit s
a
D2
8 bits
6
Data
8 bits
Data
Data
8bits
D1
7
b
b
D0
8
Technical Note
2011.03 - Rev.C
c
c
tE/W
d