MP2119CPW A1 PROs co., Ltd., MP2119CPW Datasheet
MP2119CPW
Manufacturer Part Number
MP2119CPW
Description
9-line Ultra3 Lvd/se Scsi Terminator
Manufacturer
A1 PROs co., Ltd.
Datasheet
1.MP2119CPW.pdf
(9 pages)
9-Line UL
SCSI T
The IMP2119 is a multimode SCSI terminator that conforms to the SCSI
Parallel Interconnect-2 (SPI-2) specification developed by the T10 stan-
dards committee for low voltage differential (LVD) termination.
Multimode compatibility permits the use of legacy devices on the bus
without hardware alterations. Automatic mode selection is achieved
through voltage detection on the diffsense line.
The IMP2119 delivers the ultimate in SCSI bus performance while saving
component cost and board area. Elimination of the external capacitors
also mitigates the need for a lengthy capacitor selection process. The indi-
vidual high bandwidth drivers also maximize channel separation and
reduce channel to channel noise and cross talk. The high bandwidth
architecture insures ULTRA3 performance.
When the IMP2119 is enabled, the differential sense (DIFFSENSE) pin
supplies a voltage between 1.2V and 1.4V. In application, this pin is tied
to the DIFFSENSE input of the corresponding LVD transceivers. This
action enables the LVD transceiver function. DIFFSENSE is capable of
supplying a maximum of 15mA. Tying the DIFFSENSE pin HIGH places
the IMP2119 in a high impedance state indicating the presence of an
HVD device. Tying the pin LOW places the part in a single-ended mode
while also signaling the multimode transceiver to operate in a single-
ended mode.
Recognizing the needs of portable and configurable peripherals, the
IMP2119 have a TTL compatible sleep/disable mode. During this
sleep/disable mode, power dissipation is reduced to a meager 15µA
while also placing all outputs in a high impedance state. Also during
© 2002 IMP, Inc.
9-Line UL
SCSI T
Block Diagram
DIFFSENSE
DIFF_CAP
TPWR
ISO
M/S
er
er
Power ON
minat
minat
TRA3 L
TRA3 L
Window
20kΩ
10mA
Comp.
Internal V
Power ON & MODE Delay
MODE Control & Delay
LVD
1.30V
SE
or
or
HVD
REF
VD/SE
VD/SE
Power ON
1.25V
LVD
Latch
200
1.07mA
1.07mA
sleep/disable mode, the DIFFSENSE function is disabled
and is placed in a high impedance state.
Another key feature of the IMP2119 is the master/slave
function. Driving this pin HIGH or floating the pin enables
the 1.3V DIFFSENSE reference. Driving the pin LOW dis-
ables the on board DIFFSENSE reference and enables use
of an external master reference device.
52.5
52.5
N Auto-selectable LVD or single-ended termination
N 3.0pF maximum disabled output capacitance
N Fast response, no external capacitors required
N Compatible with active negation drivers
N 15µA supply current in disconnect mode
N Logic command disconnects all termination lines
N DIFFSENSE line driver
N Ground driver integrated for single-ended
N Current limit and thermal protection
N Hot-swap compatible (single-ended)
N Compatible with SCSI, SPI-2, SPI-3, SPI-4
N Pin compatible with DS2119
ULTRA160 and ULTRA320
operation
DISC/HVD
2.2V
SE 2.85V, 22.5mA
SE
Data Communications
LVD
SE
IMP2
IMP2
IMP2
IMP2
20
HVD
Key Features
LVD
SE
1
1
1
1
1
1
1
1
LVD(-) / SE
LVD(+) / SE
(Pseudo-GND)
SE
HVD
LVD
9
9
9
9
5241/42 01 eps
1 of 9
1
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MP2119CPW Summary of contents
Page 1
UL TRA3 L 9-Line UL TRA3 L SCSI T er minat or SCSI T er minat or The IMP2119 is a multimode SCSI terminator that conforms to the SCSI Parallel Interconnect-2 (SPI-2) specification developed by the T10 stan- dards ...
Page 2
Pin Configuration TSSOP- TPWR R1P 26 R1N R2P 4 R9P R2N 6 23 R8P HS GND IMP2119 GND R3P R 3 ...
Page 3
R(1,2,3,4,5,6,7,8)N N R(1,2,3,4,5,6,7,8)P P TPWR P 4 µ ...
Page 4
Recommended Operating Conditions ...
Page 5
Section Thresholds ...
Page 6
Application Information V (+) V (–) Figure 1. Bus Voltage IMP2119 + Table 1. MASTER/SLAVE Function Table ...
Page 7
... Pin 1 4.7µF* TPWR IMP2119 DIFFSENSE ISO M/S GND NC* Pin 1 + 4.7µF* * The capacitor on pin 1 can be placed on the IMP2119CPW. This capacitor is not required with IMP devices. Figure 5. Suggested IMP2119 Universal Application Schematic © 2002 IMP, Inc. 1– 1+ Data Lines (9) 9 – 9+ 20k 20k DIFF_CAP* + 0.1µ ...
Page 8
PW Thin Small Shrink Outline (TSSOP) (28-Pin SEATING PLANE ...
Page 9
IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Fax: 408-434-1085 e-mail: info@impinc.com http://www.impweb.com The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective ...