ISL98003 Intersil, ISL98003 Datasheet - Page 20

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ISL98003

Manufacturer Part Number
ISL98003
Description
8-Bit Video Analog Front End
Manufacturer
Intersil
Datasheet

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Register Listing
ADDRESS
0x5A
0x56
0x57
0x58
0x59
0x60
0x61
Transition threshold, (0x0A)
Phase Adjust Data 3,
(read only)
Phase Adjust Data 2,
(read only)
Phase Adjust Data 1,
(read only)
Phase Adjust Data 0,
(read only)
AFE CTRL, (0x00)
ADC CTRL, (0x00)
(DEFAULT VALUE)
REGISTER
(Continued)
20
BITS
7:0
7:0
7:0
7:0
7:0
3:2
0
1
2
3
4
5
6
7
0
1
4
PADJ Threshold
Reserved
Reserved
Reserved
Reserved
Reserved
700mV calibration
Coast Clamp Enable
Reserved
Blue Midscale
Green Midscale
Red Midscale
Midscale Override
Dither Enable
Dither Amplitude
Dither Increment
Dither Seed Reset
FUNCTION NAME
ISL98003
www.DataSheet.co.kr
Threshold of transitions visible for capturing. These are the 8
0: DC-restore clamping and ABLC suspended during Coast
MSBs of the 8-bit threshold word used for phase quality
measurements. The actual 8-bit threshold used equals the
value in this register times 4.
Reserved
Reserved
Reserved
Reserved
Set to 0
0: Normal operation
1: All three inputs connected to internal ~700mV reference
1: DC-restore clamping and ABLC continue during Coast
Set to 0
0: Half scale analog shift not added to Blue Channel (UV)
1: Half scale analog shift added to Blue Channel (YRGB)
0: Half scale analog shift not added to Green Channel (UV)
1: Half scale analog shift added to Green Channel (YRGB)
0: Half scale analog shift not added to Red Channel (UV)
1: Half scale analog shift added to Red Channel (YRGB)
0: Midscale determined by RGB/YUV bit in User Control
1: Midscale determined by 0x60[6:4]
0: Dither disabled (default)
1: Dither enabled
0: 4 LSBs (default)
1: 2 LSBs
00: Every Pixel (default)
01: Every HSYNC
10 and 11: Every VSYNC
Set to 1 and then to 0 to reset
voltage
and Macrovision (default)
section – settings in 0x60[6:4] are ignored (default).
DESCRIPTION
September 12, 2008
FN6760.0
Datasheet pdf - http://www.DataSheet4U.net/

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