ISL8483E Intersil Corporation, ISL8483E Datasheet - Page 2

• Manufacturer Part Number: ISL8483E
• Description: ESD Protected to 15kV/ 5V/ Low Power/ High Speed or Slew Rate Limited/ RS-485/RS-422 Transceivers
• Manufacturer: Intersil Corporation

Pinout
Ordering Information
Pin Descriptions
ISL8483EIB
(8483EIB)
ISL8483EIB-T
(8483EIB)
ISL8483EIP
ISL8485ECB
(8485ECB)
ISL8485ECB-T
(8485ECB)
ISL8485ECP
ISL8485EIB
(8485EIB)
ISL8485EIB-T
(8485EIB)
ISL8485EIP
PART NO.
(BRAND)
GND
V
PIN
A/Y
B/Z
RO
RE
DE
DI
CC
Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating).
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
Ground connection.
±15kV HBM ESD Protected, RS-485/422 level noninverting receiver input and noninverting driver output. Pin is an input (A) if DE = 0;
pin is an output (Y) if DE = 1.
±15kV HBM ESD Protected, RS-485/422 level inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0; pin is
an output (Z) if DE = 1.
System power supply input (4.5V to 5.5V).
RANGE (
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
TEMP.
0 to 70
0 to 70
0 to 70
o
C)
8 Ld SOIC
8 Ld SOIC
Tape and Reel
8 Ld PDIP
8 Ld SOIC
8 Ld SOIC
Tape and Reel
8 Ld PDIP
8 Ld SOIC
8 Ld SOIC
Tape and Reel
8 Ld PDIP
2
PACKAGE
PKG. DWG. #
M8.15
M8.15
E8.3
M8.15
M8.15
E8.3
M8.15
M8.15
E8.3
ISL8483E, ISL8485E (PDIP, SOIC)
ISL8483E, ISL8485E
RO
RE
DE
DI
1
2
3
4
TOP VIEW
R
D
FUNCTION
Truth Tables
*Shutdown Mode for ISL8483E (see Note 7)
*Shutdown Mode for ISL8483E (see Note 7)
8
7
6
5
RE
V
B / Z
A / Y
GND
X
X
0
1
RE
CC
0
0
0
1
1
INPUTS
DE
1
1
0
0
INPUTS
DE
0
0
0
0
1
TRANSMITTING
RECEIVING
DI
X
X
1
0
Inputs Open
≥ +0.2V
≤ -0.2V
A-B
X
X
High-Z *
High-Z
Z
0
1
OUTPUTS
OUTPUT
High-Z*
High-Z
High-Z *
High-Z
RO
1
0
1
Y
1
0