ISL6565 Intersil Corporation, ISL6565 Datasheet - Page 18

• Manufacturer Part Number: ISL6565
• Description: Multi-Phase PWM Controller with Precision rDS(ON) or DCR Current Sensing for VR10.X Application
• Manufacturer: Intersil Corporation

Power Good Signal
The power good pin (PGOOD) is an open-drain logic output
that transitions high when the converter is operating after
soft start. PGOOD pulls low during shutdown and releases
high after a successful soft start. PGOOD only transitions
low when an under-voltage condition is detected or the
controller is disabled by a reset from EN, ENLL, POR, or one
of the no-CPU VID codes. After an under-voltage event,
PGOOD will return high unless the controller has been
disabled. PGOOD does not automatically transition low upon
detection of an over-voltage condition.
Under-Voltage Detection
The under-voltage threshold is set at 75% of the VID code.
When the output voltage at VSEN is below the under-voltage
threshold, PGOOD gets pulled low. No other action is taken
by the controller.
Over-Voltage Protection
When VCC is above 1.4V, but otherwise not valid as defined
under Power on Reset in Electrical Specifications, the over-
voltage trip circuit is active using auxiliary circuitry. In this
state, an over-voltage trip occurs if the voltage at VSEN
exceeds 1.8V.
With valid VCC, the over-voltage circuit is sensitive to the
voltage at VDIFF. In this state, the trip level is 1.7V prior to
valid enable conditions being met as described in Enable
and Disable. The only exception to this is when the IC has
been disabled by an over-voltage trip. In that case the over-
voltage trip point is VID plus 200mV. During soft start, the
over-voltage trip level is the higher of 1.7V or VID plus
200mV. Upon successful soft start, the over-voltage trip level
is 200mV above VID. Two actions are taken by the
VDIFF
FIGURE 13. POWER GOOD AND PROTECTION CIRCUITRY
REFERENCE
DAC
75%
VID + 0.2V
UV
AND CONTROL LOGIC
+
-
SOFT START, FAULT
OV
18
EACH CHANNEL
REPEAT FOR
OC
+
-
OC
+
-
110µA
I
1
ISL6565A, ISL6565B
PGOOD
OVP
110µA
I
AVG
ISL6565A, ISL6565B to protect the microprocessor load
when an over-voltage condition occurs.
At the inception of an over-voltage event, all PWM outputs
are commanded low until the voltage at VSEN falls below
0.6V with valid VCC or 1.5V otherwise. This causes the
Intersil drivers to turn on the lower MOSFETs and pull the
output voltage below a level that might cause damage to the
load. The PWM outputs remain low until VDIFF falls to the
programmed DAC level at which time they enter a high-
impedance state. The Intersil drivers respond to the high-
impedance input by turning off both upper and lower
MOSFETs. If the over-voltage condition reoccurs, the
ISL6565A, ISL6565B will again command the lower
MOSFETs to turn on. The ISL6565A, ISL6565B will continue
to protect the load in this fashion as long as the over-voltage
condition recurs.
Simultaneous to the protective action of the PWM outputs, the
OVP pin pulls to VCC delivering up to 100mA to the gate of a
crowbar MOSFET or SCR placed either on the input rail or the
output rail. Turning on the MOSFET or SCR collapses the
power rail and causes a fuse placed further up stream to blow.
The fuse must be sized such that the MOSFET or SCR will
not overheat before the fuse blows. The OVP pin is tolerant to
12V (see Absolute Maximum Ratings), so an external resistor
pull up can be used to augment the driving capability. If using
a pull up resistor in conjunction with the internal over-voltage
protection function, care must be taken to avoid nuisance trips
that could occur when VCC is below 2V. In that case, the
controller is incapable of holding OVP low.
Once an over-voltage condition is detected, normal PWM
operation ceases until the ISL6565A, ISL6565B is reset.
Cycling the voltage on EN, ENLL, or VCC below the POR-
falling threshold will reset the controller. Cycling the VID
codes will not reset the controller.
Over-Current Protection
ISL6565A, ISL6565B has two levels of over-current
protection. Each phase is protected from a sustained over-
current condition on a delayed basis, while the combined
phase currents are protected on an instantaneous basis.
In instantaneous protection mode, the ISL6565A, ISL6565B
takes advantage of the proportionality between the load
current and the average current, I
current condition. See the Channel-Current Balance section
for more detail on how the average current is measured. The
average current is continually compared with a constant
110µA reference current as shown in Figure 6. Once the
average current exceeds the reference current, a
comparator triggers the converter to shutdown.
In individual over-current protection mode, the ISL6565A,
ISL6565B continuously compares the current of each channel
with the same 110µA reference current. If any channel current
exceeds the reference current continuously for eight
AVG
, to detect an over-