ISL6539 Intersil Corporation, ISL6539 Datasheet
ISL6539
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ISL6539 Summary of contents
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... Data Sheet Wide Input Range Dual PWM Controller with DDR Option The ISL6539 dual PWM controller delivers high efficiency and tight regulation from two voltage regulating synchronous buck DC/DC converters. It was designed especially for DDR DRAM, SDRAM, graphic chipset applications, and system regulators in high performance applications ...
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... Ld SSOP Tape and Reel (Pb-Free) (Note) ISL6539IA - SSOP ISL6539IA SSOP Tape and Reel ISL6539IAZ (Note) - SSOP (Pb-Free) M28.15 ISL6539IAZ SSOP Tape and Reel (Pb-Free) (Note) NOTE: Intersil Pb-Free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations ...
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... Generic Application Circuits V IN 3.3V OR 5.0V TO 15V 5V ISL6539 APPLICATION CIRCUIT FOR TWO CHANNEL POWER SUPPLY V IN 3.3V OR 5.0V TO 15V 5V VREF PG2/VREF ISL6539 APPLICATION CIRCUIT FOR COMPLETE DDR MEMORY POWER SUPPLY 3 ISL6539 OCSET1 Q1 PWM1 Q2 EN1 EN2 VCC DDR PWM2 OCSET2 OCSET1 Q1 PWM1 Q2 EN1 EN2 ...
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... REFERENCE AND SOFT-START Internal Reference Voltage Reference Voltage Accuracy Soft-Start Current During Start-up Soft-Start Complete Threshold 4 ISL6539 Thermal Information Thermal Resistance (Typical, Note 2) SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Junction Temperature (Plastic Package 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s 300° ...
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... PGND1, PGND2 (Pin 3, 26) These pins provide the return connection for lower gate drivers, and are connected to sources of the lower MOSFETs of their respective converters. These pins must be connected to the ground plane through a path as low in inductance as possible. 5 ISL6539 SYMBOL TEST CONDITIONS 0.0mA < I < 5.0A; 5.0V < V VOUT1 I ...
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... PG2/REF pin. It sets the reference voltage of Channel 2 for its regulation. VCC (Pin 28) VCC provides the bias supply for the ISL6539. The supply to VCC should be locally bypassed using a ceramic capacitor. Typical Application Figures 1 and 2 show the application circuits of a dual channel DC/DC converter ...
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... ISEN1 ISEN2 2.0K LGATE1 LGATE2 PGND1 PGND2 GND VSEN2 VSEN1 PG2_REF PG1 GND U1 EN1 EN2 OCSET2_VDDQ/2 SOFT1 OCSET1 SOFT2 Rset1 100K ISL6539 VCC (5V) D2 BAT54W Cbt2 Cin2 0.15µF 10µF 0Ω Lo2 V2 (1.8V 4.7µH Co21 Co21 Co22 220µF 4.7 µF Rfb21 FDS6912A FDS6912A ...
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Block Diagram BOOT1 UGATE1 PHASE1 ADAPTIVE DEAD-TIME DIODE EMULATION PGND1 V/I SAMPLE TIMING LGATE1 VCC 16.7pF 1MΩ 500kΩ 300kΩ VSEN1 - 1.25pF 4.4kΩ 0.9V ERROR AMP 1 REF SOFT1 ISEN1 140Ω - CURRENT SAMPLE CURRENT + SAMPLE OCSET1 ...
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... DDR memory chips is also provided. Initialization The ISL6539 initializes if at least one of the enable pins is set high. The Power-On Reset (POR) function continually monitors the bias supply voltage on the VCC pin, and initiates soft-start operation when EN1 or EN2 is high after the input supply voltage exceeds 4 ...
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... MOSFET equal to the voltage generated on the sensing resistor, plus the internal resistor, along the ISEN pin current flowing path. 10 ISL6539 Feedback Loop Compensation Both channel PWM controllers have internally compensated error amplifiers. To make internal compensation possible several design measures were taken. • ...
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... Gcomp can be written in o where f = 6.98kHz 1 Outside the ISL6539 chip, a capacitor C s ------------ - + 1 parallel with the top resistor in the feedback resistor divider, Wp2 as shown in Figure 4. In this case the transfer function from the output voltage to the middle point of the divider can be ...
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... MOSFETs. Dual-Step Conversion The ISL6539 dual channel controller can be used either in power systems with a single-stage power conversion or in systems where some intermediate voltages are initially established. The choice of the approach may be dictated by the overall system design criteria, or the approach may be a matter of voltages available to the system designer ...
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... DDR memory applications, and provides all three voltages required in a DDR memory compliant computer. To reconfigure the ISL6539 for a complete DDR solution, the DDR pin should be set high permanently to the VCC rail. This activates some functions inside the chip that are specific to DDR memory power needs ...
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... When used in a DDR application with cascaded converters (VTT generated from VDDQ), several methods of synchronization are implemented in the ISL6539. When the DDR pin is connected to GND for dual switcher applications, the channels operate 180° out-of-phase. In the DDR mode, when the DDR pin is connected to VCC, the channels operate either with 0° ...
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... DCR, is preferred for less core loss and copper loss. The DC copper loss of the inductor can be estimated by: P copper 10.3V --------------------------------------------------- -------------------------------- - + 8µ 140 CS has a 45% increase at higher temperature. DSON V OUT = --------------- - ISL6539 is 300kHz. The – OUT IN ∗ DCR = load ...
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... load 16 ISL6539 AC components will be provided from the input capacitor. The input capacitor has to be able to handle this ripple current without overheating and with tolerable voltage ripple. In addition to the capacitance, a ceramic capacitor is generally used between the drain terminal of the upper ...
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... The overvoltage test can be done on ISL6539 by connecting the VSEN pin to an external voltage source or signal generator through a diode. When the external voltage, or signal ...
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... ISL6539. The best tie-point between the signal ground and the power ground is at the negative side of the output capacitor on each channel, where there is less noise. Noisy traces beneath the ISL6539 are not recommended. GND and VCC Pins At least one high quality ceramic decoupling cap should be used across these two pins ...
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... The other components should connect to signal ground. Signal and power ground are tied together at the negative terminal of the output capacitors. 19 ISL6539 Decoupling Capacitor for Switching MOSFET It is recommended that ceramic caps be used closely connected to the drain side of the upper MOSFET, and the source of the lower MOSFET ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 20 ISL6539 M28.15 28 LEAD SHRINK NARROW BODY SMALL OUTLINE M ...