ISL6529 Intersil Corporation, ISL6529 Datasheet - Page 5

• Manufacturer Part Number: ISL6529
• Description: Dual Regulator.Synchronous Rectified Buck PWM and Linear Power Controller
• Manufacturer: Intersil Corporation

Electrical Specifications
NOTE:
Functional Pin Descriptions
LGATE (Pin 1), (Pin 16 MLFP)
Lower gate drive output. Connect to gate of the low-side
MOSFET.
PGND (Pin 2), (Pin 1 MLFP)
This pin is the power ground return for the lower gate driver.
GND (Pin 3), (Pin 2 MLFP)
Signal ground for the IC. All voltage levels are measured with
respect to this pin. Place via close to pin to minimize
impedance path to ground plane.
5VCC (Pin 4), (Pin 3 MLFP)
Provide a well decoupled 5V bias supply for the IC to this
pin. The voltage at this pin is monitored for Power-On Reset
(POR) purposes.
DRIVE2(Pin 5), (Pin 4 MLFP)
Connect this pin to the gate terminal of an external
N-Channel MOSFET transistor. This pin provides the gate
voltage for the linear regulator pass transistor. It also
UGATE and LGATE Sink Current
UGATE and LGATE OUTPUT IMPEDANCE
LINEAR REGULATOR (DRIVE2)
DC Gain
Gain-Bandwidth Product
Slew Rate
FB2 Input Current
Drive2 High Output Voltage
Drive2 Low Output Voltage
Drive2 High Output Source Current
Drive2 Low Output Sink Current
Over-Voltage Level (V
Under-Voltage Level (V
REGULATOR ISOLATION
Change in Linear Regulator Output Voltage
Change in PWM Regulator Output Voltage
3. Measured in the evaluation board.
PARAMETER
DRIVE2
LGATE
PGND
5VCC
GND
FB2
NC = NO INTERNAL CONNECTION
NC
FB2
FB2
1
2
3
5
6
7
4
/V
/V
REF
REF
)
5
)
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic (Continued)
3
14
3
13
12
11
10
9
8
FB
NC
NC
NC
UGATE
12VCC
COMP
V
V
I
SYMBOL
I
OUT
OUT
R
OUT
OUT
GBWP
∆Vout
∆Vout
I
GATE
DS(on)
V
V
I
SR
OV
UV
I
High
Low

High
Low
12VCC = 12V
12VCC = 12V
R
R
R
V
Percent of Nominal
Percent of Nominal
Linear Output = 2.5V, 6A Load Change on PWM
PWM Output = 1.5V, 1A Load Change on Linear
FB2
L
L
L
= 10k, C
= 10k, C
= 10k, C
ISL6529
= 0.8V
TEST CONDITIONS
L
L
L
= 10pf
= 10pf
= 10pf
provides a means of compensating the error amplifier for
applications where the user needs to optimize the regulator
transient response.
FB2 (Pin 6), (Pin 5 MLFP)
Connect the output of the linear regulator to this pin
through a properly sized resistor divider. The voltage at this
pin is regulated to 0.8V. This pin is also monitored for
undervoltage events.
Pulling and holding FB2 above 1.28V shuts down both
regulators. Releasing FB2 initiates soft-start on both regulators.
NC (Pins 7, 8, 11, and 12), (Pins 6, 7, 8, 11, 13 and
15 MLFP)
No internal connection.
FB (Pin 9), (Pin 9 MLFP) and COMP (Pin 10), (Pin
10 MLFP).
FB and COMP are the available external pins of the error
amplifier. The FB pin is the inverting input of the error amplifier
and the COMP pin is the error amplifier output. These pins are
used to compensate the voltage-mode control feedback loop of
the standard synchronous rectified buck converter.
12VCC(Pin 13), (Pin 12 MLFP)
Provides bias voltage for the gate drivers.The voltage at this
pin is monitored for Power-On Reset (POR) purposes.
UGATE (Pin 14), (Pin 14 MLFP)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the MOSFET.
0.85
MIN
-0.7
9.5
-
-
-
-
-
-
-
-
-
-
-
<0.5
<0.5
TYP
10.3
51.5
-1.4
160
3.1
0.1
1.2
80
15
20
1
6
MAX
150
4.3
1.0
-
-
-
-
-
-
-
-
-
-
UNITS
MHz
V/µs
mA
mA
dB
nA
%
%
%
%
Ω
A
V
V