ISL6326 Intersil Corporation, ISL6326 Datasheet - Page 24

• Manufacturer Part Number: ISL6326
• Description: 4-Phase PWM Controller
• Manufacturer: Intersil Corporation

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The sensed current will flow out of the IDROOP pin and
develop a droop voltage across the resistor equivalent (R
between the FB and VDIFF pins. If R
as the temperature increases, the temperature impact on the
droop can be compensated. An NTC resistor can be placed
close to the power stage and used to form R
non-linear temperature characteristics of the NTC, a resistor
network is needed to make the equivalent resistance
between the FB and VDIFF pins reverse proportional to the
temperature.
The external temperature compensation network can only
compensate the temperature impact on the droop, while it
has no impact to the sensed current inside ISL6326.
Therefore, this network cannot compensate for the
temperature impact on the overcurrent protection function.
Current Sense Output
The current from the IDROOP pin is the sensed average
current inside the ISL6326. In typical application, the
IDROOP pin is connected to the FB pin for the application
where load line is required.
When load line function is not needed, the IDROOP pin can
be used to obtain the load current information: with one
resistor from the IDROOP pin to GND, the voltage at the
IDROOP pin will be proportional to the load current:
where V
is the resistor between the IDROOP pin and GND, I
the total output current of the converter, R
resistor connected to the ISEN+ pin, N is the active channel
number, and R
element, either the DCR of the inductor or R
depending on the sensing method.
The resistor from the IDROOP pin to GND should be chosen
to ensure that the voltage at the IDROOP pin is less than 2V
under the maximum load current.
If the IDROOP pin is not use, tie it to GND.
V
FIGURE 15. EXTERNAL TEMPERATURE COMPENSATION
IDROOP
IDROOP
=
--------------------------- -
R
IDROOP
o
X
C
N
is the voltage at the IDROOP pin, R
is the resistance of the current sense
----------------- - I
R
ISEN
R
IDROOP
X
COMP
VDIFF
24
LOAD
FB
ISL6326
Internal
circuit
FB
resistance reduces
ISEN
SENSE
FB
. Due to the
is the sense
LOAD
IDROOP
(EQ. 23)
FB
is
)
ISL6326
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multiphase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
addition to this guide, Intersil provides complete reference
designs that include schematics, bills of materials, and
example board layouts for all common microprocessor
applications.
Power Stages
The first step in designing a multiphase converter is to
determine the number of phases. This determination
depends heavily on the cost analysis which in turn depends
on system constraints that differ from one design to the next.
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board; whether through-hole components are permitted; and
the total board space available for power-supply circuitry.
Generally speaking, the most economical solutions are
those in which each phase handles between 15 and 20A. All
surface-mount designs will tend toward the lower end of this
current range. If through-hole MOSFETs and inductors can
be used, higher per-phase currents are possible. In cases
where board space is the limiting constraint, current can be
pushed as high as 40A per phase, but these designs require
heat sinks and forced air to cool the MOSFETs, inductors
and heat-dissipating surfaces.
MOSFETs
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching
frequency; the capability of the MOSFETs to dissipate heat;
and the availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (R
continuous output current; I
current (see Equation 1); d is the duty cycle (V
L is the per-channel inductance.
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I
frequency, f
the beginning and the end of the lower-MOSFET conduction
interval respectively.
P
LOW 1
,
=
r
S
DS ON
; and the length of dead times, t
DS(ON)
(
)
⎛
⎜
⎝
). In Equation 24, I
I
----- -
N
M
⎞
⎟
⎠
2
(
M
1 d
, V
PP
–
D(ON)
)
is the peak-to-peak inductor
+
I
--------------------------------
L PP
,
2
; the switching
12
(
M
1 d
–
is the maximum
)
d1
OUT
and t
/V
April 21, 2006
IN
d2
(EQ. 24)
FN9262.0
); and
, at