ISL34341 Intersil Corporation, ISL34341 Datasheet
ISL34341
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ISL34341 Summary of contents
Page 1
... RANGE (Note) MARKING (°C) ISL34341INZ* ISL34341INZ - EPTQFP Q64.10x10C *Add “-T13” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, ...
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... RGBA7 RGBB0 RGBB1 RGBB2 RGBB3 GND_IO Block Diagram SCL SDA RAM 3 V/H/DE TDM RGB 24 VIDEO_TX (HI) PCLK_IN (REF_CLK WHEN VIDEO_TX IS LO) PCLK_OUT 2 ISL34341 ISL34341 (64 LD TQFP) TOP VIEW MUX 8b/10b DEMUX CDR x30 ÷30 32 ...
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... Digital Supply Current PLL/VCO Supply Current Analog Bias Supply Current Total 1.8V Supply Current Total 3.3V Supply Current 3 ISL34341 Thermal Information Thermal Resistance (Typical, Notes 1, 2) EPTQFP Maximum Power Dissipation 327mW Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . . .-40° ...
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... DESERIALIZER REFERENCE CLOCK (REF_CLK IS FED INTO PCLK_IN) REF_CLK Lock Time REF_CLK to PCLK_OUT Maximum Frequency Offset HIGH-SPEED TRANSMITTER HS Differential Output Voltage, Transition Bit HS Differential Output Voltage, Non-Transition Bit VOD 4 ISL34341 = +25°C, Ref_Res = 3.16kΩ, High-speed AC-coupling A SYMBOL CONDITIONS RSTB = GND; spec is per device V ...
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... PIN NUMBER PIN NAME 52 to 63, RGBA[7:0 RGBB[7:0], RGBC[7:0] 22 HSYNC 23 VSYNC 21 DATAEN 26 PCLK_IN 51 PCLK_OUT 41, 40 SERIOP, SERION 24 HSYNCPOL 25 VSYNCPOL 5 ISL34341 = +25°C, Ref_Res = 3.16kΩ, High-speed AC-coupling A SYMBOL CONDITIONS V OCM Δ OUT t Part-to-part LPD t t 20 SKEW t RJ ...
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... The various differently-named Ground pins are internally weakly connected. They must be tied together externally. The different names are provided to assist in minimizing the current loops involved in bypassing the associated supply VDD pins. In particular, for ESD testing, they should be considered a common connection. 6 ISL34341 SERIALIZER CMOS input for video flow direction 1: video serializer ...
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... Diagrams VIDEO_TX = 1 PCLK_IN t IS RGB[A:C][7:0] HSYNC VSYNC DATAEN FIGURE 2. PARALLEL VIDEO INPUT TIMING [HSYNCPOL = 0, VSYNCPOL = 0, PCLKPOL (reg ISL34341 VOD TR FIGURE 1. VOD vs TXCN SETTING 1 VALID DATA VALID DATA t IS VOD NTR TXCN 0x00 0x0F 0xF0 0xFF t IDC DATA IGNORED ...
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... FIGURE 3. PARALLEL VIDEO OUTPUT TIMING [HSYNCPOL = 0, VSYNCPOL = 0, PCLKPOL (reg Applications Overview A pair of ISL34341 SERDES transports 24-bit parallel video (16-bit parallel video for the ISL34321) along with auxiliary data over a single 100Ω differential cable either to a display or from a camera. Auxiliary data is transferred in both directions and can be used for remote configuration and telemetry ...
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... IC. Figure 4 shows the grounding of the various capacitors to the pin corresponding to the supply pin. Although all the ground 9 ISL34341 supplies are tied together, the PCB layout should be arranged to emulate this arrangement, at least for the smaller value (high frequency) capacitors, as much as possible ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 ISL34341 2 C FN6827.0 ...
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... MIN GAGE PLANE 0.25 0.010 PIN 1 EJECTOR PIN MARK NOT PIN # EJECTOR PIN MARK NOT PIN #1 ID BOTTOM VIEW 11 ISL34341 D D1 - -13 -H- D2 Q64.10x10C (JEDEC MS-026ACD-HU ISSUE D) 64 LEAD THIN PLASTIC QUAD FLATPACK EXPOSED ...