ISL23445 Intersil Corporation, ISL23445 Datasheet

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ISL23445

Manufacturer Part Number
ISL23445
Description
Low Voltage Digitally Controlled Potentiometer
Manufacturer
Intersil Corporation
Datasheet

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www.DataSheet.co.kr
Quad, 256 Tap, Low Voltage Digitally Controlled
Potentiometer (XDCP™)
ISL23445
The ISL23445 is a volatile, low voltage, low noise, low power, 256
tap, quad digitally controlled potentiometer (DCP) with an SPI
Bus
and control logic on a monolithic CMOS integrated circuit.
Each digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
SPI bus interface. Each potentiometer has an associated
volatile Wiper Register (WRi, i = 0, 1, 2, 3) that can be directly
written to and read by the user. The contents of the WRi
controls the position of the wiper. When powered on, the wiper
of each DCP will always commence at mid-scale (128 tap
position).
The low voltage, low power consumption, and small package
of the ISL23445 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23445 has a V
pin allowing down to 1.2V bus operation, independent from the
V
directly to the ISL23445 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Applications
• Power supply margining
• Trimming sensor circuits
• Gain adjustment in battery powered instruments
• RF power amplifier bias compensation
June 21, 2011
FN7874.0
CC
10000
8000
6000
4000
2000
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
value. This allows for low logic levels to be connected
interface. It integrates four DCP cores, wiper switches
0
0
POSITION, 10kΩ DCP
64
TAP POSITION (DECIMAL)
1
128
192
LOGIC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
1-888-INTERSIL or 1-888-468-3774
256
Features
• Four potentiometers per package
• 256 resistor taps
• 10kΩ, 50kΩ or 100kΩ total resistance
• SPI serial interface
• Maximum supply current without serial bus activity
• Shutdown Mode
• Power supply
• Wiper resistance: 70Ω typical @ V
• Power-on preset to mid-scale (128 tap position)
• Extended industrial temperature range: -40
• 20 Ld TSSOP or 20 Ld QFN packages
• Pb-free (RoHS compliant)
- No additional level translator for low bus supply
- Daisy Chaining of multiple DCPs
(standby)
- 5µA @ V
- 2uA @ V
- Forces the DCP into an end-to-end open circuit and RWi is
- Reduces power consumption by disconnecting the DCP
- V
- V
ISL23445
1 DCP
connected to RLi internally
resistor from the circuit
All other trademarks mentioned are the property of their respective owners
CC
LOGIC
of
= 1.7V to 5.5V analog power supply
= 1.2V to 5.5V SPI bus/logic power supply
V
CC
CC
REF
RH1
RL1
FIGURE 2. V
and V
and V
|
Copyright Intersil Americas Inc. 2011. All Rights Reserved
RW1
LOGIC
LOGIC
= 1.7V
= 5V
REF
+
-
ADJUSTMENT
ISL28114
CC
= 3.3V
°
C to +125
V
REF_M
°
C
Datasheet pdf - http://www.DataSheet4U.net/

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ISL23445 Summary of contents

Page 1

... Quad, 256 Tap, Low Voltage Digitally Controlled Potentiometer (XDCP™) ISL23445 The ISL23445 is a volatile, low voltage, low noise, low power, 256 tap, quad digitally controlled potentiometer (DCP) with an SPI ™ Bus interface. It integrates four DCP cores, wiper switches and control logic on a monolithic CMOS integrated circuit. ...

Page 2

... GND LOGIC SDI 10 ISL23445 (20 LD QFN) TOP VIEW RH0 3 RL1 4 RW1 5 RH1 6 GND ISL23445 V CC POWER UP INTERFACE CONTROL LEVEL AND SHIFTER STATUS LOGIC GND Pin Descriptions TSSOP 1 2 RL3 RW3 18 RH3 4 17 RL2 RW2 ...

Page 3

... RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL23445. For more information on MSL please see techbrief TB363. 3 ...

Page 4

... Resistor Noise Density Feed Thru Digital Feed-through from Bus to Wiper Wiper at middle point PSRR Power Supply Reject Ratio 4 ISL23445 Thermal Information Thermal Resistance (Typical TSSOP Package (Notes QFN Package (Notes Maximum Junction Temperature (Plastic Package .+150°C Storage Temperature Range .-65° ...

Page 5

... Integral Non-linearity, Guaranteed INL (Note 18) Monotonic R Differential Non-linearity, Guaranteed DNL (Note 17) Monotonic 5 ISL23445 V = 2.7V to 5.5V 1.2V to 5.5V over recommended operating conditions unless otherwise CC LOGIC stated. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) TEST CONDITIONS @ RH; measured at RW, unloaded option ...

Page 6

... LOGIC I V Shutdown Current CC SHDN CC I Leakage Current, at Pins CS, SDO, SDI, LkgDig SCK 6 ISL23445 V = 2.7V to 5.5V 1.2V to 5.5V over recommended operating conditions unless otherwise CC LOGIC stated. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) TEST CONDITIONS W option 2. option ...

Page 7

... HO t SDO Output Rise Time RO t SDO Output Fall Time FO 7 ISL23445 V = 2.7V to 5.5V 1.2V to 5.5V over recommended operating conditions unless otherwise CC LOGIC stated. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) TEST CONDITIONS CS rising edge to the new position of the wiper ...

Page 8

... CC 22. VMATCH = [V(RWx)i - V(RWy)i]/LSB, for 255 and 23. RMATCH = (RWi,x - RWi,y)/MI, for 255 , and ISL23445 For SCK, SDI, SDO, CS Unless Otherwise Noted. (Continued) TEST CONDITIONS and V(RW) are V(RW) for the DCP register set to FF hex and 00 hex respectively. LSB is the incremental ...

Page 9

... Timing Diagrams Input Timing CS SCK t SU MSB SDI SDO Output Timing CS SCK t SO SDO ADDR SDI XDCP™ Timing (For All Load Instructions) CS SCK MSB SDI V W SDO 9 ISL23445 R TOTAL 32pF 32pF LEAD CYC ... ... t HO MSB ...

Page 10

... TAP POSITION (DECIMAL) FIGURE 3. 10kΩ DNL vs TAP POSITION, V 0.4 0.2 0.0 -0.2 -0 TAP POSITION (DECIMAL) FIGURE 5. 10kΩ INL vs TAP POSITION, V 0.4 0.2 0.0 -0.2 -0 TAP POSITION (DECIMAL) FIGURE 7. 10kΩ RDNL vs TAP POSITION ISL23445 0.12 0.06 0.00 -0.06 -0.12 128 192 256 = 3.3V, +25°C CC 0.12 0.06 0.00 -0.06 -0.12 128 192 256 = 3.3V, +25°C CC 0.10 0.05 0.00 -0.05 -0.10 128 ...

Page 11

... TAP POSITION (DECIMAL) FIGURE 11. 10kΩ WIPER RESISTANCE vs TAP POSITION, V 400 300 200 100 111 TAP POSITION (DECIMAL) FIGURE 13. 10kΩ TCv vs TAP POSITION ISL23445 (Continued) 0.50 0.25 0.00 -0.25 -0.50 128 192 256 = 3.3V, +25°C FIGURE 10. 50kΩ RINL vs TAP POSITION 120 +125°C ...

Page 12

... TAP POSITION (DECIMAL) FIGURE 17. 100kΩ TCv vs TAP POSITION, V CH1: 1V/DIV, 1µs/DIV CH2: 10mV/DIV, 1µs/DIV FIGURE 19. WIPER DIGITAL FEED-THROUGH 12 ISL23445 (Continued) 200 150 100 159 207 255 FIGURE 16. 50kΩ TCr vs TAP POSITION, V 120 ...

Page 13

... I I The high (RHi and low (RLi terminals of the ISL23445 are equivalent to the fixed terminals of a mechanical potentiometer. RHi and RLi are referenced to the relative position of the wiper and not the voltage potential on the terminals. With WRi set to 255 decimal, the wiper will be closest to RHi, and with the WRi set to 0, the wiper is closest to RLi ...

Page 14

... WR0, Wiper Register WR1, Wiper Register WR2, Wiper Register WR3 and Access Control Register (ACR). The memory map of ISL23445 is shown in Table 1. The Wiper Register WRi at address i, contains current wiper position of DCPi ( 3). The Access Control Register (ACR) at address 10h contains information and control bits described in Table 2 ...

Page 15

... SCK, and clocked out on the falling edge of SCK. CS must be LOW during communication with the ISL23445. The SCK and CS lines are controlled by the host or master. The ISL23445 operates only as a slave device. All communication over the SPI interface is conducted by sending the MSB of each byte of data first ...

Page 16

... Writes and reads can be made directly to these registers to control and monitor the wiper position. Daisy Chain Configuration When an application needs more than one ISL23445, it can communicate with all of them without additional CS lines by daisy chaining the DCPs, as shown in Figure 29. In Daisy Chain ...

Page 17

... ISL23445 V LOGIC It is recommended to keep V normal operation case where turning V necessary recommended to ground the V ISL23445. Grounding the V not affect other devices on the same bus good practice to put a 1µF capacitor in parallel with 0.1µF decoupling capacitor close to the recommended to put a 1µ ...

Page 18

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 18 ISL23445 16 CLKS 16 CLKS RD DCP0 RD DCP1 FIGURE 32 ...

Page 19

... TOP VIEW e C SEATING PLANE b 0. LEADS SIDE VIEW SEE DETAIL “X” c END VIEW DETAIL X 19 ISL23445 MDP0044 THIN SHRINK SMALL OUTLINE PACKAGE FAMILY A (N/2)+1 SYMBOL PIN #1 I.D. 0. (N/2) N/2 LEAD TIPS 0.05 H NOTES: 0. GAUGE PLANE 0.25 L 0° - 8° ...

Page 20

... Package Outline Drawing L20.3x4 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 3/10 3. PIN 1 INDEX AREA A TOP VIEW (2.65) (3.80) (1.65) (2.80) TYPICAL RECOMMENDED LAND PATTERN 20 ISL23445 0. 0.05 B 20X 4 4.00 0.15 (4X) VIEW "A-A" 20x 0.40±0.10 0.9± 0.10 (16 x 0.50) (20 x 0.25) (20 x 0.60) NOTES: 1. Dimensions are in millimeters. ...

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