ISL21400 Intersil Corporation, ISL21400 Datasheet - Page 11

• Manufacturer Part Number: ISL21400
• Description: Programmable Temperature Slope Voltage Reference
• Manufacturer: Intersil Corporation

Register Descriptions
Register 0: Bandgap Reference Gain (Nonvolatile)
Register 0 sets the output voltage of the bandgap reference
(V
from Register 0 as follows:
This term of Equation 1 can vary from 0 to 1.20V.
Register 1: Temperature Slope Gain (Nonvolatile)
Register 1 sets the Temperature Slope (TS) of the
temperature sensor. Referring to Equation 1, the number “m”
is the setting from Register 1 as follows:
V
V
+136mV at -40°C to -126mV at +85°C. The other term varies
from -1 to +1 and scales the temperature term before adding
to the V
Register 2: Device Gain and Storage (nonvolatile)
Register 2 contains 2 bits (2 LSB’s) which control the output
gain of the device. Table 3 shows the state of these two bits
V
TS
TS
REF
REG
REF
TABLE 3. REGISTER 2 OUTPUT GAIN (NONVOLATILE):
0
1
2
3
4
(
------------------------------- -
is the temperature dependent term and varies from
Addr
2 m
GAIN1
•
). Referring to Equation 1, the number “n” is the setting
•
0
1
2
3
4
0
0
1
1
--------- -
255
255
REF
n
) 255
NONVOLATILE
–
, for n=0 to 255
TABLE 2. REGISTER DESCRIPTIONS
portion.
OUTPUT GAIN
Y
Y
Y
Y
Y
V
(MSB)
TS7
REF
D7
D7
D7
D7
GAIN0
0
1
0
1
7
Reference setting
Temperature Sensor setting
Gain and storage
Storage
Storage
11
V
TS6
REF
D6
D6
D6
D6
DESCRIPTION
OUTPUT GAIN, A
6
x 1
x 2
x 2
x 4
TABLE 1. ISL21400 REGISTER BIT MAP
V
TS5
REF
D5
D5
D5
D5
5
V
ISL21400
V
REF
TS4
D4
D4
D4
D4
4
and the resulting output gain. Note that two states produce
the same gain (Gain 1:0 set to 01b and 10b) of x2.
The other 6 bits in the register can be used for general
purpose memory (nonvolatile) or left alone.
Registers 3 and 4: general purpose data
(nonvolatile)
These two registers are one byte each and can be used for
general purpose nonvolatile memory.
I
The ISL21400 supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the
bus as a transmitter and the receiving device as the receiver.
The device controlling the transfer is the master and the
device being controlled is the slave. The master always
initiates data transfers and provides the clock for both
transmit and receive operations. Therefore, the ISL21400
operates as a slave device in all applications.
All communication over the I
sending the MSB of each byte of data first.
Protocol Conventions
Data states on the SDA line can change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (See
Figure 10). On power-up of the ISL21400 the SDA pin is in
the input mode.
All I
condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH. The ISL21400 continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition is met (See
Figure 10). A START condition is ignored during the power-
up sequence and during non-volatile write cycles for the
device.
All I
condition, which is a LOW to HIGH transition of SDA while
SCL is HIGH (See Figure 10) A STOP condition at the end of
a read operation, or at the end of a write operation places
the device in its standby mode. A STOP condition at the end
of a write operation to a non-volatile byte initiates an internal
2
C Serial Interface
2
2
C interface operations must begin with a START
C interface operations must be terminated by a STOP
V
TS3
REF
D3
D3
D3
D3
3
V
TS2
REF
D2
D2
D2
D2
2
2
C interface is conducted by
V
GAIN1
TS1
REF
D1
D1
D1
1
December 14, 2006
V
GAIN0
(LSB)
TS0
REF
D0
D0
D0
FN8091.0
0