ISL1219 Intersil Corporation, ISL1219 Datasheet
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ISL1219
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ISL1219 Summary of contents
Page 1
... Low Power RTC with Battery Backed SRAM and Event Detection The ISL1219 device is a low power real time clock with Event Detect and Time Stamp function, timing and crystal compensation, clock/calendar, power fail indicator, periodic or polled alarm, intelligent battery backup switching and 2 Bytes of battery-backed user SRAM ...
Page 2
... Serial Clock (SCL). The SCL input is used to clock all serial data into and out of the device. 9 IRQ/F Interrupt Output IRQ, /Frequency Output F OUT output pin. The function is set via the configuration register DD. ISL1219 INTERFACE CRYSTAL RTC OSCILLATOR DIVIDER POR FREQUENCY ...
Page 3
... V IH Hysteresis I EVIN Pull-up Current EVPU IRQ/F and EVDET OUT V Output Low Voltage OL I Output Leakage Current LO ISL1219 Thermal Information Pins Thermal Resistance (Typical, Note 1) OUT Moisture Sensitivity (see Technical Brief TB363 Level 2 + 0.5 (V Mode -0. 0.5 (V Mode) BAT BAT Test Conditions +2.7 to +5.5V, Temperature = -40° ...
Page 4
... STOP Condition Setup Time SU:STO t STOP Condition Hold Time HD:STO t Output Data Hold Time DH t SDA and SCL Rise Time R ISL1219 = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise stated. DD CONDITIONS Test Conditions +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified. DD TEST CONDITIONS 3mA ...
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... May change from LOW to HIGH May change from HIGH to LOW Don’t Care: Changes Allowed N/A ISL1219 Test Conditions +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified. DD TEST CONDITIONS From 70 DD. Total on-chip and off-chip Maximum is determined by t For Cb = 400pF, max is about 2~2.5kΩ ...
Page 6
... FIGURE 1. I 2.4E-06 2.2E- 2.0E-06 1.8E-06 1.6E- 3.3V 1.4E-06 1.2E-06 1.0E-06 -40 -20 0 TEMPERATURE (°C) FIGURE TEMPERATURE DD1 2.1E-6 2.0E-6 1.9E-6 1.8E-6 1.7E-6 1.6E-6 1.5E-6 1.4E-6 1.3E-6 1.2E-6 F OUT (Hz) FIGURE DD1 ISL1219 Temperature is +25°C unless otherwise specified 3.5 4.0 4.5 5.0 5.5 ( BAT BAT 3.3V OUT DD 6 1E-6 800E-9 600E-9 400E-9 200E-9 000E+0 -40 - TEMPERATURE (°C) FIGURE 2 ...
Page 7
... X1, X2 The X1 and X2 pins are the input and output, respectively inverting amplifier. An external 32.768kHz quartz crystal is used with the ISL1219 to supply a timebase for the real time clock. Internal compensation circuitry provides high accuracy over the operating temperature range from -40°C to +85°C. This oscillator compensation network can ...
Page 8
... Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power the ISL1219 for years. Another option is to use a Super Cap for applications where month. See the Applications Section for more information ...
Page 9
... RTCs are commonly packaged on < V BAT TRIP a board with a battery connected. In order to preserve battery life, the ISL1219 will not draw any power from the battery source until after the device is first powered up from the V battery backup mode whenever V Event/Tamper Monitor and Detection 3 ...
Page 10
... The RTC also has leap-year correction. The clock also corrects for months having fewer than 31 days and has a bit that controls 24 hour or AM/PM format. When the ISL1219 powers up after the loss of both V not begin incrementing until at least one byte is written to the clock register. TABLE 1. ∆ ...
Page 11
... The frequency output can be enabled/disabled during battery backup mode using the FOBATB bit. General Purpose User SRAM The ISL1219 provides 2 bytes of user SRAM. The SRAM will continue to operate in battery backup mode. However should be noted that the I C bus is disabled in battery backup mode ...
Page 12
... MOT 19h YRT YRT23 12 ISL1219 user can execute a current address read and continue reading the next register not necessary to set the WRTC bit prior to writing into the control and status, alarm, and user SRAM registers. TABLE 5. REGISTER MEMORY MAP ...
Page 13
... Years divisible by 100 are not leap years, unless they are also divisible by 400. This means that the year 2000 is a leap year, the year 2100 is not. The ISL1219 does not correct for the leap year in the year 2100. ...
Page 14
... ISL1219 These bits enable/disable the frequency output function and select the output frequency at the IRQ/F Table 8 for frequency selection. When the frequency mode is enabled, it will override the alarm mode at the IRQ/F FREQUENCY OUTPUT AND INTERRUPT BIT (FOBATB) This bit enables/disables the F backup mode (i.e. V FOBATB is set to “ ...
Page 15
... EVENT DETECT ENABLE BIT (EVEN) This bit enables/disables the Event Detect function of the ISL1219. When this bit is set to “1”, the Event Detect and Time Stamp are active. When this bit is cleared to “0”, the Event Detect and Time Stamp are disabled. Only the first Event is Time Stamped in a series of Events between Event resets (see EVT bit in the Status Register) ...
Page 16
... Note that these are typical values. BATTERY MODE ATR SELECTION (BMATR <1:0>) Since the accuracy of the crystal oscillator is dependent on the V /V operation, the ISL1219 provides the capability DD BAT to adjust the capacitance between V device switches between power sources. TABLE 12. ...
Page 17
... I C Serial Interface enabled The ISL1219 supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter and the receiving device as the receiver. The device controlling the transfer is the master and the device being controlled is the slave. The master always initiates data transfers and provides the clock for both transmit and receive operations ...
Page 18
... Data states on the SDA line can change only during SCL LOW periods. SDA state changes during SCL HIGH are reserved for indicating START and STOP conditions (See Figure 14). On power up of the ISL1219, the SDA pin is in the input mode. 2 All I ...
Page 19
... Identification byte with the R/W bit set to “1”. After each of the three bytes, the ISL1219 responds with an ACK. Then the ISL1219 transmits Data Bytes as long as the master responds with an ACK during the SCL cycle following the eighth bit of each byte. The master terminates the read operation (issuing a STOP condition) following the last bit of the last Data Byte (See Figure 18) ...
Page 20
... Application Section Event Detection The event detection feature of the ISL1219 is intended to be used for recording the time of single events that involve the opening of an enclosure, door, etc. The normal method of detection is with normally closed switch function that opens to initiate the event. This mechanism is ideal for applications such as set top boxes, utility meters, security alarm and camera systems or vending machines ...
Page 21
... In addition to the analog compensation afforded by the adjustable load capacitance, a digital compensation feature is available for the ISL1219. There are 3 bits known as the Digital Trimming Register (DTR). The range provided is ±60ppm in increments of 20ppm. DTR operates by adding or skipping pulses in the clock counter very useful for ...
Page 22
... T A sample curve of the ATR setting vs. Frequency Adjustment for the ISL1219 and a typical RTC crystal is given in Figure 21. This curve may vary with different crystals good practice to evaluate a given crystal in an ISL1219 circuit before establishing the adjustment values ...
Page 23
... A Super Capacitor can be used as an alternative to a battery in cases where shorter backup times are required. Since the battery backup supply current required by the ISL1219 is extremely low possible to get months of backup operation using a Super Capacitor. Typical capacitor values are a few µ Farad or more depending on the application ...
Page 24
... LKG V = 4.7V BAT2 V = 1.8V BAT1 Solving gives 5. (4.387 E-7)/(2.9) = 0.784F BAT If the 30% tolerance is included for tolerances, then worst case cap value would be 1.3 *.784 = 1.02F BAT 24 ISL1219 = 4.387E-7 A BATAVG voltage will vary BAT (EQ )/(V – LKG BAT2 BAT1 (EQ. 7) FN6314.1 August 14, 2006 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 25 ISL1219 M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE θ ...