16F84A Microchip Technology, 16F84A Datasheet - Page 8

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16F84A

Manufacturer Part Number
16F84A
Description
18-pin Enhanced Flash/EEPROM 8-Bit Microcontroller
Manufacturer
Microchip Technology
Datasheet
PIC16F84A
2.2.2.1
The STATUS register contains the arithmetic status of
the ALU, the RESET status and the bank select bit for
data memory.
As with any register, the STATUS register can be the
destination for any instruction. If the STATUS register is
the destination for an instruction that affects the Z, DC
or C bits, then the write to these three bits is disabled.
These bits are set or cleared according to device logic.
Furthermore, the TO and PD bits are not writable.
Therefore, the result of an instruction with the STATUS
register as destination may be different than intended.
For example, CLRF STATUS will clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
FIGURE 2-1:
DS35007A-page 8
bit7
bit 7:
bit 6-5: RP1:RP0: Register Bank Select bits (used for direct addressing)
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W-0
IRP
STATUS REGISTER
IRP: Register Bank Select bit (used for indirect addressing)
The IRP bit is not used by the PIC16F84A. IRP should be maintained clear.
00 = Bank 0 (00h - 7Fh)
01 = Bank 1 (80h - FFh)
Each bank is 128 bytes. Only bit RP0 is used by the PIC16F84A. RP1 should be maintained clear.
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (for ADDWF and ADDLW instructions) (For borrow the polarity is reversed)
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (for ADDWF and ADDLW instructions)
1 = A carry-out from the most significant bit of the result occurred
0 = No carry-out from the most significant bit of the result occurred
Note:For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of
R/W-0
RP1
STATUS REGISTER (ADDRESS 03h, 83h)
the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low
order bit of the source register.
R/W-0
RP0
R-1
TO
R-1
PD
Preliminary
R/W-x
Z
Only the BCF, BSF, SWAPF and MOVWF instructions
should be used to alter the STATUS register (Table 7-2)
because these instructions do not affect any status bit.
R/W-x
DC
Note 1: The IRP and RP1 bits (STATUS<7:6>) are
Note 2: The C and DC bits operate as a borrow
Note 3: When the STATUS register is the
R/W-x
not used by the PIC16F84A and should be
programmed as cleared. Use of these bits
as general purpose R/W bits is NOT
recommended, since this may affect
upward compatibility with future products.
and digit borrow out bit, respectively, in
subtraction. See the SUBLW and SUBWF
instructions for examples.
destination for an instruction that affects
the Z, DC or C bits, then the write to these
three bits is disabled. The specified bit(s)
will be updated according to device logic
C
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1998 Microchip Technology Inc.
read as ‘0’

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