BD9106FVM Rohm, BD9106FVM Datasheet - Page 13

• Manufacturer Part Number: BD9106FVM
• Description: (BD9102FVM / BD9104FVM / BD9106FVM) Output 1.5A or Less High Efficiency Step-down Switching Regulators
• Manufacturer: Rohm

© 2009 ROHM Co., Ltd. All rights reserved.
BD9102FVM, BD9104FVM, BD9106FVM
www.rohm.com
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance
with CR zero correction by the error amplifier.
Phase
Phase
V
4. Determination of RITH, CITH that works as a phase compensator
5. Determination of output voltage (for BD9106FVM only)
[deg]
[deg]
Gain
Gain
[dB]
[dB]
CC
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
The output voltage V
V
With R1 and R2 adjusted, the output voltage may be determined
as required.(Adjustable output voltage range： 1.0V～2.5V)
Use 1 kΩ～100 kΩ resistor for R1. If a resistor of the resistance
higher than100 kΩ is used, check the assembled set carefully for
ripple voltage etc.
Fig.54 Error amp phase compensation characteristics
ADJ
-90
-90
A
A
0
0
0
0
: Voltage at ADJ terminal (0.8V Typ.)
fz
(Amp.)
V
Fig.53 Open loop gain characteristics
Cin
R
C
OUT
ITH
ITH
= fp
2π×R
I
V
OUT
Fig.55 Typical application
OUT
(Min.)
fp(Min.)
fz(Amp.)
Min.
=(R2/R1+1)×V
EN
V
ITH
ITH
OUT
OUT
1
×C
fp(Max.)
is determined by the equation (7):
ITH
I
OUT
V
GND,PGND
CC
Max.
,PV
CC
=
ADJ
fz(ESR)
・・・(7)
SW
2π×R
OMax.
L
ESR
C
1
O
×C
O
13/17
fp=
fz
Pole at power amplifier
Zero at power amplifier
(ESR)
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
Increasing capacitance of the output capacitor lowers the pole
frequency while the zero frequency does not change. (This
is because when the capacitance is doubled, the capacitor
ESR reduces to half.)
R
O
www.DataSheet.co.kr
2π×R
=
V
OUT
2π×E
1
O
×C
fp
fp
fz
1
SR
O
(Min.)
(Max.)
(Amp.)
×C
=
O
=
=
Fig.56 Determination of output voltage
2π×R
2π×R
2π×R
1
6
SW
ADJ
OMax.
OMin.
ITH.
1
1
1
×C
×C
×C
ITH
O
O
4.7μH
[Hz]←with lighter load
[Hz]←with heavier load
10μF
Technical Note
2009.05 - Rev.A
R2
R1
Output
Datasheet pdf - http://www.DataSheet4U.net/